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path: root/src/cpu/intel/model_65x
AgeCommit message (Expand)Author
2021-10-26src/cpu: drop CPU_X86_CACHE_HELPER and x86_enable_cache wrapper functionFelix Held
2021-10-26cpu/intel/*/Kconfig: move selection of CPU_X86_CACHE_HELPERFelix Held
2021-07-02src: Introduce `ARCH_ALL_STAGES_X86`Angel Pons
2021-06-30src: Move `select ARCH_X86` to platformsAngel Pons
2020-09-26arch/x86: Introduce `ARCH_ALL_STAGES_X86_32`Angel Pons
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-10src/cpu: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS
2020-04-04src/cpu: Use SPDX for GPL-2.0-only filesAngel Pons
2020-01-18cpu/intel/model_6?x{slot_1}: Leave enabling CONFIG_SMP to the mainboardKeith Hui
2019-09-10AUTHORS: Move src/cpu/intel copyrights into AUTHORS fileMartin Roth
2019-07-01Use 3rdparty/intel-microcodeArthur Heymans
2018-06-01src/cpu: Remove unneeded includesElyes HAOUAS
2017-11-23Constify struct cpu_device_id instancesJonathan Neuschäfer
2016-08-23src/cpu: Capitalize CPU, APIC and IOAPIC typo fixElyes HAOUAS
2016-07-31src/cpu: Capitalize CPUElyes HAOUAS
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-09-30cpu: microcode: Use microcode stored in binary formatAlexandru Gagniuc
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-05-053rdparty: move to 3rdparty/blobsPatrick Georgi
2015-05-053rdparty: Move to blobsPatrick Georgi
2015-02-28cpu/intel: (non-FSP) Remove microcode updates from treeAlexandru Gagniuc
2015-02-28cpu/intel (non-FSP): Use microcode from blobs repositoryAlexandru Gagniuc
2015-01-27vboot2: add verstageStefan Reinauer
2014-10-27{arch,cpu,drivers,ec}: Don't hide pointers behind typedefsEdward O'Callaghan
2014-05-06Introduce stage-specific architecture for corebootFurquan Shaikh
2014-05-03Move ARCH_* from board/Kconfig to cpu or soc Kconfig.Furquan Shaikh
2014-02-12PCI: Drop includes under cpuKyösti Mälkki
2014-01-16cpu/intel: Remove dummy terminators from microcode blobsAlexandru Gagniuc
2014-01-16cpu/intel: Make all Intel CPUs load microcode from CBFSAlexandru Gagniuc
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2012-11-27Get rid of drivers classPatrick Georgi
2012-01-10MTRR: get physical address size from CPUIDSven Schnelle
2011-08-04cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs.Keith Hui
2010-10-18update intel microcode files.Stefan Reinauer
2010-10-16Move support for Deschutes Slot 1 CPUs (model_65x) into its own directory.Keith Hui
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