summaryrefslogtreecommitdiff
path: root/src/cpu/intel/model_206ax/model_206ax.h
AgeCommit message (Expand)Author
2019-06-21cpu/intel/{haswell,model_206{5,a}x}: Use MSR_CORE_THREAD_COUNT for msr at 0x35Elyes HAOUAS
2019-01-22cpu/intel/model_206ax: Use parallel MP initArthur Heymans
2018-10-30src: Add missing include <stdint.h>Elyes HAOUAS
2018-10-11src: Move common IA-32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS
2018-09-26cpu/intel/model_206ax: detect number of MCE banksDan Elkouby
2018-07-28intel/sandybridge: Don't hardcode platform typePatrick Rudolph
2018-04-11Revert "model_206ax: Use parallel MP init"Arthur Heymans
2018-04-11model_206ax: Use parallel MP initArthur Heymans
2018-04-10cpu/intel/sandybridge: Put stage cache into TSEGArthur Heymans
2017-03-16cpu/intel: Indent with tabsLee Leahy
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-05-28Migrate 206ax to SMM_MODULESVladimir Serbinenko
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2013-05-10Drop prototype guarding for romccStefan Reinauer
2013-02-09speedstep: Deduplicate some MSR identifiersPatrick Georgi
2012-07-26CPU: Add option to set TCC activation offsetDuncan Laurie
2012-07-25Fix comment to reference IvyBridge, tooStefan Reinauer
2012-07-24CPU: Set flex ratio to nominal TDP ratio in bootblockDuncan Laurie
2012-07-24CPU: Update ivybridge PP1 current limit valueDuncan Laurie
2012-07-24CPU: Add basic support for Nominal Configurable TDPDuncan Laurie
2012-04-05Add support for Intel Sandybridge CPUStefan Reinauer