coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2018-06-21	Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location"	Arthur Heymans
2018-02-27	sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location	Arthur Heymans
2017-06-28	cpu/intel: add IS_ENABLED() around Kconfig symbol references	Martin Roth
2017-03-16	cpu/intel: Add int to unsigned	Lee Leahy
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-10-15	cpu/mtrr.h: Fix macro names for MTRR registers	Alexandru Gagniuc
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2014-12-02	Replace hlt with halt()	Patrick Georgi
2014-01-15	nehalem/sandy/ivy/haswell: Enable WRPROT cache for all of flash	Kyösti Mälkki
2013-03-22	x86: Unify arch/io.h and arch/romcc_io.h	Stefan Reinauer
2013-03-01	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel
2012-07-26	Enable Microcode in CBFS for all SandyBridge/IvyBridge systems	Stefan Reinauer
2012-07-24	CPU: Set flex ratio to nominal TDP ratio in bootblock	Duncan Laurie
2012-07-24	Add code to read Intel microcode from CBFS	Vadim Bendebury
2012-07-24	Rename microcode include file to be model agnostic	Vadim Bendebury
2012-04-26	Revamp Intel microcode update code	Stefan Reinauer
2012-04-05	Add support for Intel Sandybridge CPU	Stefan Reinauer