| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-06-21 | Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location" | Arthur Heymans |
| 2018-02-27 | sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location | Arthur Heymans |
| 2017-06-28 | cpu/intel: add IS_ENABLED() around Kconfig symbol references | Martin Roth |
| 2017-03-16 | cpu/intel: Add int to unsigned | Lee Leahy |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-10-15 | cpu/mtrr.h: Fix macro names for MTRR registers | Alexandru Gagniuc |
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2014-12-02 | Replace hlt with halt() | Patrick Georgi |
| 2014-01-15 | nehalem/sandy/ivy/haswell: Enable WRPROT cache for all of flash | Kyösti Mälkki |
| 2013-11-21 | Fix error message on wrong compiles of 2065x | Vladimir Serbinenko |
| 2013-06-13 | Add support for Intel Nehalem CPU | Vladimir Serbinenko |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |