| Age | Commit message (Expand) | Author |
|---|
| 2019-03-06 | src: Drop unused include <arch/acpi.h> | Elyes HAOUAS |
| 2019-03-04 | arch/io.h: Drop unnecessary include | Kyösti Mälkki |
| 2019-02-25 | security/vboot: Add measured boot mode | Philipp Deppenwiese |
| 2019-02-12 | postcar: Make more use of postcar_frame_add_romcache() | Nico Huber |
| 2019-01-09 | cpu/intel: Use the common code to initialize the romstage timestamps | Arthur Heymans |
| 2019-01-06 | device: Use pcidev_on_root() | Kyösti Mälkki |
| 2019-01-03 | nb/intel/haswell: Add support for PEG | Tristan Corrick |
| 2018-12-28 | arch/x86: SSE2 implies SSE support | Kyösti Mälkki |
| 2018-12-20 | cpu/intel/common: decouple IA32_FEATURE_CONTROL lock from set_vmx() | Matt DeVillier |
| 2018-12-18 | cpu: Remove unneeded include <pc80/mc146818rtc.h> | Elyes HAOUAS |
| 2018-12-13 | cpuid: Add helper function for cpuid(1) functions | Subrata Banik |
| 2018-11-30 | cpu/intel/common: Use a common acpi/cpu.asl file | Arthur Heymans |
| 2018-11-30 | cpu/intel/haswell: Rework acpi/cpu.asl | Arthur Heymans |
| 2018-11-16 | src: Remove unneeded include <cbfs.h> | Elyes HAOUAS |
| 2018-11-12 | src: Remove unneeded include "{arch,cpu}/cpu.h" | Elyes HAOUAS |
| 2018-11-01 | cpu/intel/haswell: Only change the slow ramp rate for ULT CPUs | Tristan Corrick |
| 2018-11-01 | cpu/intel/haswell: Allow use of TSC for the monotonic timer | Tristan Corrick |
| 2018-11-01 | cpu/intel/haswell: Add the CPUID for Haswell C0 CPUs | Tristan Corrick |
| 2018-10-22 | intel: Use CF9 reset (part 1) | Patrick Rudolph |
| 2018-10-11 | src: Move common IA-32 MSRs to <cpu/x86/msr.h> | Elyes HAOUAS |
| 2018-10-05 | src: Fix MSR_PKG_CST_CONFIG_CONTROL register name | Elyes HAOUAS |
| 2018-09-28 | src/*: normalize Google copyright headers | Patrick Georgi |
| 2018-08-13 | src: Get rid of non-local header treated as local | Elyes HAOUAS |
| 2018-08-09 | src/cpu: Fix typo | Elyes HAOUAS |
| 2018-07-25 | drivers/tpm: Add TPM ramstage driver for devices without vboot. | Philipp Deppenwiese |
| 2018-07-24 | cpu/x86/mtrr.h: Rename MSR SMRR_PHYS_x to IA32_SMRR_PHYSx | Arthur Heymans |
| 2018-06-14 | cpu/intel/haswell: Use the common intel romstage_main function | Arthur Heymans |
| 2018-06-06 | arch/x86: Make RELOCATABLE_RAMSTAGE the default | Kyösti Mälkki |
| 2018-06-05 | cpu/intel/haswell: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE support | Arthur Heymans |
| 2018-06-04 | security/tpm: Unify the coreboot TPM software stack | Philipp Deppenwiese |
| 2018-04-30 | cpu/intel: Get rid of device_t | Elyes HAOUAS |
| 2018-04-20 | pci: Move inline PCI functions to pci_ops.h | Patrick Rudolph |
| 2018-02-06 | cpu/intel/haswell: Don't select PARALLEL_CPU_INIT | Arthur Heymans |
| 2018-01-18 | security/tpm: Change TPM naming for different layers. | Philipp Deppenwiese |
| 2018-01-18 | security/tpm: Move tpm TSS and TSPI layer to security section | Philipp Deppenwiese |
| 2017-11-23 | Constify struct cpu_device_id instances | Jonathan Neuschäfer |
| 2017-10-04 | chromeec: Remove checks for EC in RO | Daisuke Nojiri |
| 2017-09-11 | cpu/x86/mp_init: remove adjust_cpu_apic_entry() | Aaron Durbin |
| 2017-07-06 | cpu/intel/haswell: Fix undefined behavior | Ryan Salsamendi |
| 2017-06-28 | cpu/intel: add IS_ENABLED() around Kconfig symbol references | Martin Roth |
| 2017-06-28 | cpu/*: Add whitespace around '<<' | Elyes HAOUAS |
| 2017-06-16 | haswell: add CBMEM_MEMINFO table when initing RAM | Matt DeVillier |
| 2017-06-07 | Use more secure HTTPS URLs for coreboot sites | Paul Menzel |
| 2017-03-16 | cpu/intel: Wrap lines at 80 columns | Lee Leahy |
| 2017-03-16 | cpu/intel: Fix brace issues detected by checkpatch.pl | Lee Leahy |
| 2017-03-16 | cpu/intel: Add int to unsigned | Lee Leahy |
| 2017-03-16 | cpu/intel: Fix the spacing issues | Lee Leahy |
| 2017-03-16 | cpu/intel: Indent with tabs | Lee Leahy |
| 2016-12-27 | cpu/intel/common: Add/Use common function to set virtualization | Matt DeVillier |
| 2016-12-06 | CPU: Declare cpu_phys_address_size() for all arch | Kyösti Mälkki |
| 2016-12-01 | romstage_handoff: remove code duplication | Aaron Durbin |
| 2016-11-18 | intel post-car: Increase stacktop alignment | Kyösti Mälkki |
| 2016-11-11 | intel cache-as-ram: Unify stack setup | Kyösti Mälkki |
| 2016-10-31 | lib/prog_loaders: use common ramstage_cache_invalid() | Aaron Durbin |
| 2016-08-23 | src/cpu: Capitalize CPU, APIC and IOAPIC typo fix | Elyes HAOUAS |
| 2016-07-31 | src/cpu: Capitalize CPU | Elyes HAOUAS |
| 2016-07-31 | src/cpu: Capitalize ROM and RAM | Elyes HAOUAS |
| 2016-07-23 | intel/haswell: Remove useless MTRR clear | Kyösti Mälkki |
| 2016-07-23 | intel/haswell post-car: Minor fix on MTRR setting | Kyösti Mälkki |
| 2016-07-23 | intel/haswell: Add asmlinkage for romstage_after_car() | Kyösti Mälkki |
| 2016-07-22 | intel car: Unify postcodes | Kyösti Mälkki |
| 2016-07-22 | intel car: Unify whitespace and comment fixes | Kyösti Mälkki |
| 2016-07-10 | intel post-car: Consolidate choose_top_of_stack() | Kyösti Mälkki |
| 2016-06-29 | intel/haswell: No need for ACPI S3 resume backup | Kyösti Mälkki |
| 2016-06-29 | intel romstage: Use run_ramstage() | Kyösti Mälkki |
| 2016-06-22 | ACPI S3: Add common recovery code | Kyösti Mälkki |
| 2016-06-22 | Ignore RAMTOP for MTRRs | Kyösti Mälkki |
| 2016-06-18 | intel cache_as_ram: Fix typo in comment | Kyösti Mälkki |
| 2016-06-17 | Move definitions of HIGH_MEMORY_SAVE | Kyösti Mälkki |
| 2016-06-17 | Fix some cbmem.h includes | Kyösti Mälkki |
| 2016-05-06 | {cpu,soc}/intel: remove unused smm_init() function | Aaron Durbin |
| 2016-05-06 | cpu/intel/haswell: convert to using common MP and SMM init | Aaron Durbin |
| 2016-05-04 | cpu/x86: remove BACKUP_DEFAULT_SMM_REGION option | Aaron Durbin |
| 2016-05-02 | cpu/x86/mp_init: remove unused callback arguments | Aaron Durbin |
| 2016-03-08 | x86 chipsets: utilize x86_setup_mtrrs_with_detect() | Aaron Durbin |
| 2016-02-26 | tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))" | Denis 'GNUtoo' Carikli |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-10-15 | cpu/mtrr.h: Fix macro names for MTRR registers | Alexandru Gagniuc |
| 2015-09-30 | cpu: microcode: Use microcode stored in binary format | Alexandru Gagniuc |
| 2015-09-24 | coreboot: move TS_END_ROMSTAGE to one spot | Aaron Durbin |
| 2015-09-04 | x86: remove cpu_incs as romstage Make variable | Aaron Durbin |
| 2015-08-25 | Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in Kconfig | Martin Roth |
| 2015-07-07 | x86: Drop -Wa,--divide | Stefan Reinauer |
| 2015-06-09 | stage_cache: use cbmem init hooks | Aaron Durbin |
| 2015-06-08 | Remove empty lines at end of file | Elyes HAOUAS |
| 2015-06-05 | device_ops: add device_t argument to acpi_fill_ssdt_generator | Alexander Couzens |
| 2015-05-28 | smm: Merge configs SMM_MODULES and SMM_TSEG | Vladimir Serbinenko |
| 2015-05-28 | intel: Remove pstate_coord_type. | Vladimir Serbinenko |
| 2015-05-27 | Move TPM code out of chromeos | Vladimir Serbinenko |
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2015-05-19 | intel/haswell: Drop MONOTONIC_TIMER_MSR | Patrick Georgi |
| 2015-05-05 | 3rdparty: move to 3rdparty/blobs | Patrick Georgi |
| 2015-05-05 | 3rdparty: Move to blobs | Patrick Georgi |
| 2015-05-05 | haswell: Link stage_cache_external_region into ramstage, too | Sol Boucher |
| 2015-04-30 | cpu/intel/haswell: remove dependency on socket_rpga989 | Matt DeVillier |
| 2015-04-22 | coreboot: common stage cache | Aaron Durbin |
| 2015-03-17 | haswell: Fix monotonic timer integration | Stefan Reinauer |
| 2015-02-28 | cpu/intel: (non-FSP) Remove microcode updates from tree | Alexandru Gagniuc |
| 2015-02-28 | cpu/intel (non-FSP): Use microcode from blobs repository | Alexandru Gagniuc |
