coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-08-30	cpu/intel/haswell: Set LT_LOCK_MEMORY MSR on finalize step	Angel Pons
2020-07-10	cpu/intel/haswell/finalize.c: Drop dead code	Angel Pons
2020-05-13	src: Remove unused '#include <stdint.h>'	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-04	src/cpu: Use SPDX for GPL-2.0-only files	Angel Pons
2019-10-31	cpu/x86: make set_msr_bit publicly available	Michael Niewöhner
2019-09-10	AUTHORS: Move src/cpu/intel copyrights into AUTHORS file	Martin Roth
2019-06-22	src/cpu: Use 'include <stdlib.h>' when appropriate	Elyes HAOUAS
2018-11-12	src: Remove unneeded include "{arch,cpu}/cpu.h"	Elyes HAOUAS
2018-10-05	src: Fix MSR_PKG_CST_CONFIG_CONTROL register name	Elyes HAOUAS
2018-08-09	src/cpu: Fix typo	Elyes HAOUAS
2017-03-16	cpu/intel: Add int to unsigned	Lee Leahy
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-02-11	cpu/intel: >= nehalem: add comments to msr finalize's	Alexander Couzens
2013-03-14	haswell: Add initial support for Haswell platforms	Aaron Durbin