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path: root/src/cpu/intel/haswell/cache_as_ram.inc
AgeCommit message (Expand)Author
2017-06-07Use more secure HTTPS URLs for coreboot sitesPaul Menzel
2016-11-11intel cache-as-ram: Unify stack setupKyösti Mälkki
2016-07-31src/cpu: Capitalize ROM and RAMElyes HAOUAS
2016-07-23intel/haswell: Remove useless MTRR clearKyösti Mälkki
2016-07-22intel car: Unify postcodesKyösti Mälkki
2016-07-22intel car: Unify whitespace and comment fixesKyösti Mälkki
2016-06-18intel cache_as_ram: Fix typo in commentKyösti Mälkki
2016-06-17Fix some cbmem.h includesKyösti Mälkki
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-15cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc
2015-08-25Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in KconfigMartin Roth
2015-07-07x86: Drop -Wa,--divideStefan Reinauer
2015-06-08Remove empty lines at end of fileElyes HAOUAS
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2014-10-19x86 romstage: Move stack just below RAMTOPKyösti Mälkki
2014-01-26src/cpu: Fix spelling of MTTR to MTRRPaul Menzel
2013-07-10usbdebug: Put ehci_debug_info in CAR_GLOBALKyösti Mälkki
2013-03-18haswell: add romstage_after_car() functionAaron Durbin
2013-03-18haswell: romstage: pass stack pointer and MTRRsAaron Durbin
2013-03-18haswell: adjust CAR usageAaron Durbin
2013-03-14haswell: Add initial support for Haswell platformsAaron Durbin
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