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path: root/src/cpu/amd/model_lx/cache_as_ram.inc
AgeCommit message (Expand)Author
2012-02-13AMD Geode cpus: apply un-written naming rulesKyösti Mälkki
2011-04-11Unify use of post_codeAlexandru Gagniuc
2010-09-23Whitespace/typo/cosmetic fixes (trivial).Uwe Hermann
2010-06-07replace outb -> port 0x80 with post_code() in some places.Stefan Reinauer
2010-04-21* clean up all but two warnings on artecgroup dbe61Stefan Reinauer
2010-04-09Drop ASM_CONSOLE_LOGLEVEL from LX car code. We do output in C in copy_and_run /Stefan Reinauer
2010-04-01- get rid of ASM_CONSOLE_LOGLEVEL except in two assembler files.Stefan Reinauer
2010-02-09Allow building images with different prefixes (ie. normal/romstage,Patrick Georgi
2010-01-26- Clean up and comment writing of MSRs for cache control (Backport from v3)Edwin Beasant
2009-10-03Remove:Patrick Georgi
2009-08-11cpu/amd/model_lx used its own routine for copying coreboot_ram. ThisPatrick Georgi
2009-06-30This patch unifies the use of config options in v2 to all start with CONFIG_Stefan Reinauer
2008-10-22Speed up copying coreboot to ram by using "movsl" instead of "movsb".Jens Rottmann
2008-01-18Rename almost all occurences of LinuxBIOS to coreboot. Stefan Reinauer
2008-01-18Please bear with me - another rename checkin. This qualifies as trivial, noStefan Reinauer
2007-05-22Add missing license headers, minor cosmetic fixes in existing headers.Uwe Hermann
2007-05-05This is the final patch to enable the msm800sev to build. This patchRonald G. Minnich
2007-05-04This patch adds support for the AMD Geode LX CPU. (rediffed)Marc Jones