coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2015-05-26	AGESA: Halt on S3 resume failure	Kyösti Mälkki
2015-05-26	AGESA: Split S3 support file	Kyösti Mälkki
2015-05-26	AGESA: Refactor OEM S3 storage	Kyösti Mälkki
2015-05-26	AGESA: Move S3 related SPI writes again	Kyösti Mälkki
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2014-10-19	AGESA: Drop board and chipset -specific callout headers	Kyösti Mälkki
2014-07-28	AGESA: Drop some excessive agesawrapper.h includes	Kyösti Mälkki
2014-07-03	AGESA: Clean separation of SPI flash	Kyösti Mälkki
2014-07-03	AGESA boards: Add prepare_for_resume()	Kyösti Mälkki
2014-07-03	AGESA S3: Refactor S3 backup store locations in SPI	Kyösti Mälkki
2014-04-13	cpu/amd/agesa/s3_resume.c: Specify include paths from AGESA_ROOT	Alexandru Gagniuc
2014-04-03	amd/agesa/s3_resume: Make compiler agnostic.	Edward O'Callaghan
2014-02-12	PCI: Drop includes under cpu	Kyösti Mälkki
2014-01-22	AMD AGESA: Fix CBMEM on S3 resume	Kyösti Mälkki
2013-09-11	CBMEM: Drop parameter from cbmem_reinit()	Kyösti Mälkki
2013-09-11	CBMEM: Backup top_of_ram instead of cbmem_toc	Kyösti Mälkki
2013-06-29	AMD S3 resume: Add framwork to write bigger data	Siyuan Wang
2013-06-13	AMD S3 resume: use a function to replace duplicated code	Siyuan Wang
2013-02-28	Drop CONFIG_WRITE_HIGH_TABLES	Stefan Reinauer
2013-02-26	Revert "AMD S3: Program the flash in a bigger data packet"	Dave Frodin
2013-02-18	AMD S3: Program the flash in a bigger data packet	Zheng Bao
2013-02-11	spi.h: Rename the spi.h to spi-generic.h	Zheng Bao
2013-02-11	AMD S3: Add missing erasing flash sector for saving MTRR register	Zheng Bao
2013-02-11	AMD S3: Change the hardcoded data size to macros.	Zheng Bao
2012-12-12	Claim the SPI bus before writes if the IMC ROM is present	Martin Roth
2012-11-30	AMD S3: Leverage the public SPI routine	Zheng Bao
2012-08-04	Make the device tree available in the rom stage	Stefan Reinauer
2012-07-03	AGESA F15 wrapper for Trinity	zbao
2012-04-16	S3 code in coreboot public folder.	zbao