Age | Commit message (Expand) | Author |
2024-03-15 | treewide: Move stdlib.h to commonlib | Maximilian Brune |
2024-03-14 | arch/riscv: support physical memory protection (PMP) registers | Ronald G Minnich |
2024-03-09 | arch/riscv: Remove typedefs | Maximilian Brune |
2024-03-09 | arch/riscv: Add SMP support for exception handler | Xiang Wang |
2024-03-06 | arch/riscv: Makefile.mk: Fix incorrect config variable | Ronald G Minnich |
2024-03-04 | riscv/mb/qemu: fix DRAM probing | Philipp Hug |
2024-02-18 | arch/riscv/Makefile.mk: Fix OpenSBI compilation | Maximilian Brune |
2024-02-18 | arch to cpu: Add SPDX license headers to Kconfig files | Martin Roth |
2024-02-10 | arch/riscv/boot.c: Comment OpenSBI Supervisor mode switch | Maximilian Brune |
2024-02-07 | arch/riscv: Add OPENSBI_FW_DYNAMIC_BOOT_HART option | Maximilian Brune |
2024-01-24 | acpi,arch,commonlib: Rename Makefiles from .inc to .mk | Martin Roth |
2024-01-18 | include/memlayout.h: Add OPENSBI linker macro | Maximilian Brune |
2023-12-20 | arch/riscv: Use same indent levels for switch/case | Felix Singer |
2023-12-09 | arch/riscv/payload: Remove old RISC-V CSR names | Lennart Eichhorn |
2023-11-23 | arch/riscv/romstage: Start from assembly | Arthur Heymans |
2023-11-13 | arch/x86/riscv: Use 'all' target to include files in all stages | Arthur Heymans |
2023-11-13 | arch/riscv/ramstage.S: Add comments for passed arguments | Maximilian Brune |
2023-06-11 | arch/riscv: Add clang as supported architecture | Arthur Heymans |
2023-06-11 | arch/riscv: Always build opensbi with GCC | Arthur Heymans |
2023-06-11 | arch/risc/mcall.h: Make the stack pointer global | Arthur Heymans |
2023-05-26 | treewide: Remove 'extern' from functions declaration | Elyes Haouas |
2023-04-21 | arch/riscv/trap_handler.c: Use new names for CSR | Arthur Heymans |
2023-04-21 | arch/riscv: Fix compiler argument for clang | Arthur Heymans |
2023-02-09 | treewide: Remove repeated words | Elyes Haouas |
2022-12-25 | arch/riscv: Use 'enum cb_err' | Elyes Haouas |
2022-11-22 | src/arch: Remove unnecessary space after casts | Elyes Haouas |
2022-11-17 | arch/{arm64,riscv}: Remove "CRIT: " from log messages | Elyes Haouas |
2022-09-17 | riscv: Enable the newfangled way of selecting instruction sets | Patrick Georgi |
2022-09-14 | 3rdparty/opensbi: Update to latest ToT | Patrick Georgi |
2022-09-06 | src: remove force-included header rules.h from individual files | Martin Roth |
2022-07-14 | commonlib: Substitude macro "__unused" in compiler.h | Bill XIE |
2022-06-07 | commonlib: Clean up compiler.h | Julius Werner |
2022-06-01 | cbfs: Rename TYPE_FIT to TYPE_FIT_PAYLOAD | Julius Werner |
2022-05-11 | *.h: Fix up typos in guarding | Arthur Heymans |
2022-01-19 | arch/riscv: Fix some SMP related headers | Kyösti Mälkki |
2021-11-25 | arch/{arm,arm64,ppc64,riscv}: Add noop cpu_relax | Raul E Rangel |
2021-10-05 | src/acpi to src/lib: Fix spelling errors | Martin Roth |
2021-09-19 | arch/riscv: Avoid gcc11 replacing memset implementation with memset call | Patrick Georgi |
2021-09-17 | arch/riscv/trap_handler: add missing types.h include | Felix Held |
2021-07-26 | arch/{arm,ppc64,riscv}: Remove cpu_info | Raul E Rangel |
2021-03-17 | cbfs: Remove prog_locate() for payloads (SELF and FIT) | Julius Werner |
2021-02-07 | src: Remove redundant include <rules.h> | Elyes HAOUAS |
2020-08-27 | symbols: Change implementation details of DECLARE_OPTIONAL_REGION() | Julius Werner |
2020-08-24 | src/arch: Drop unneeded empty lines | Elyes HAOUAS |
2020-08-18 | src: Remove unused 'include <stddef.h> | Elyes HAOUAS |
2020-06-13 | treewide: Add Kconfig variable MEMLAYOUT_LD_FILE | Furquan Shaikh |
2020-06-02 | src: Remove unused '#include <cbfs.h>' | Elyes HAOUAS |
2020-05-18 | src: Remove unused 'include <lib.h>' | Elyes HAOUAS |
2020-05-18 | src: Remove leading blank lines from SPDX header | Elyes HAOUAS |
2020-05-13 | src: Remove unused '#include <stdint.h>' | Elyes HAOUAS |
2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
2020-03-06 | src/arch/riscv: Convert to SPDX license header | Patrick Georgi |
2020-01-28 | commonlib: Add commonlib/bsd | Julius Werner |
2019-12-19 | src/arch: Remove unused <stdlib.h> | Elyes HAOUAS |
2019-11-30 | arch/*/*/early_variables.h: drop unused files | Arthur Heymans |
2019-11-25 | Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol | Arthur Heymans |
2019-11-10 | lib/Kconfig: Remove RAMSTAGE_CBMEM_TOP_ARG | Arthur Heymans |
2019-11-10 | arch/riscv: Pass cbmem_top to ramstage via calling argument | Arthur Heymans |
2019-11-06 | arch/riscv: Use FDT from calling argument when using FIT | Arthur Heymans |
2019-11-06 | arch/riscv: Rename `stages.c` to `romstage.c` | Nico Huber |
2019-11-05 | arch/riscv: Don't link `stages.c` into ramstage | Nico Huber |
2019-10-20 | src: Remove unused 'include <string.h>' | Elyes HAOUAS |
2019-09-09 | arch/x86: Refactor CAR_GLOBAL quirk for FSP1.0 | Kyösti Mälkki |
2019-08-26 | arch/non-x86: Use ENV_ROMSTAGE_OR_BEFORE | Kyösti Mälkki |
2019-08-20 | arch/non-x86: Remove use of __PRE_RAM__ | Kyösti Mälkki |
2019-08-08 | arch/riscv: Enable FIT support | Jonathan Neuschäfer |
2019-08-03 | riscv: add support for OpenSBI | Xiang Wang |
2019-07-28 | riscv: Remove unused headers | Patrick Rudolph |
2019-07-12 | arch, include, soc: Use common stdint.h | Jacob Garber |
2019-07-02 | arch/riscv: Make RISCV specific options depend on ARCH_RISCV | Arthur Heymans |
2019-06-28 | arch/riscv/mcall: Drop debug code | Patrick Rudolph |
2019-06-23 | riscv: workaround selfboot putting the coreboot table into prog_entry_arg | Xiang Wang |
2019-06-23 | riscv: use mret to invoke M-mode payload and disable interrupts | Xiang Wang |
2019-06-23 | riscv: Fix MENTRY_FRAME_SIZE to fit different machine lengths | Xiang Wang |
2019-06-04 | arch/riscv/Kconfig: Make correct default value for CONFIG_ARCH_RISCV_M | Subrata Banik |
2019-04-23 | src: Use include <console/console.h> when appropriate | Elyes HAOUAS |
2019-04-23 | src: Add missing include 'console.h' | Elyes HAOUAS |
2019-03-20 | src: Use 'include <string.h>' when appropriate | Elyes HAOUAS |
2019-03-08 | coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) | Julius Werner |
2019-03-04 | arch/io.h: Separate MMIO and PNP ops | Kyösti Mälkki |
2019-03-04 | device/mmio.h: Add include file for MMIO ops | Kyösti Mälkki |
2019-02-13 | riscv: Add initial support for 32bit boards | Philipp Hug |
2019-02-09 | riscv: Use correct argument in a1 when invoking payload | Philipp Hug |
2019-02-02 | riscv: Show hart id in trap handler | Philipp Hug |
2019-02-02 | riscv: Simplify payload handling | Xiang Wang |
2019-01-24 | riscv: ARCH_RISCV_RV{32,64} selects ARCH_RISCV | Ronald G. Minnich |
2019-01-17 | riscv: create Kconfig architecture features for new parts | Ronald G. Minnich |
2019-01-16 | buildsystem: Promote rules.h to default include | Kyösti Mälkki |
2018-12-19 | arch/riscv: Don't set FPU state to "dirty" | Jonathan Neuschäfer |
2018-12-19 | arch/riscv: Define and use SBI_ENOSYS | Jonathan Neuschäfer |
2018-12-18 | arch/riscv: Don't hardcode CSR numbers anymore | Jonathan Neuschäfer |
2018-12-07 | riscv: fix non-SMP support | Philipp Hug |
2018-11-19 | src: Add required space after "switch" | Elyes HAOUAS |
2018-11-05 | riscv: add support for supervisor binary interface (SBI) | Xiang Wang |
2018-11-05 | riscv: add support to block smp in each stage | Xiang Wang |
2018-11-05 | riscv: add support smp_pause / smp_resume | Xiang Wang |
2018-10-30 | src: Add missing include <stdint.h> | Elyes HAOUAS |
2018-10-30 | riscv: simplify timer interrupt handling | Philipp Hug |
2018-10-30 | src/arch/riscv/misaligned.c: Fix an off-by-one error when loading the opcode | Philipp Hug |
2018-10-11 | selfboot: remove bounce buffers | Ronald G. Minnich |