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-rw-r--r--util/superiotool/fintek.c42
1 files changed, 26 insertions, 16 deletions
diff --git a/util/superiotool/fintek.c b/util/superiotool/fintek.c
index aba0353a6b..e1ddfd76c4 100644
--- a/util/superiotool/fintek.c
+++ b/util/superiotool/fintek.c
@@ -77,13 +77,13 @@ static const struct superio_registers reg_table[] = {
{0x30,0xf0,0xf1,0xf4,0xf5,0xf7,EOT},
{0x00,0x00,NANA,0x06,0x1c,0x01,EOT}},
{EOT}}},
- {0x0710, "F71869AD", {
+ {0x0710, "F71869A/AD", {
/* We assume reserved bits are read as 0. */
{NOLDN, NULL,
- {0x02,0x07,0x20,0x21,0x25,0x26,0x27,0x28,0x29,0x2a,
- 0x2b,0x2c,0x2d,EOT},
- {0x00,0x00,0x08,0x14,0x00,0x00,MISC,0x38,0x6f,0x07,
- 0x0f,0x00,0x28,EOT}},
+ {0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,
+ 0x29,0x29,0x2a,0x2a,0x2b,0x2b,0x2c,0x2c,0x2d,EOT},
+ {0x00,0x00,0x10,0x07,0x19,0x34,0x00,0x00,NANA,0x38,
+ 0x6f,0x03,0x0f,0xe7,0x0f,NANA,0x00,NANA,0x28,EOT}},
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
{0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
@@ -105,19 +105,29 @@ static const struct superio_registers reg_table[] = {
{0x6, "GPIO",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,
0xe2,0xe3,0xe4,0xe5,0xe6,0xd0,0xd1,0xd2,0xd3,0xc0,
- 0xc1,0xc2,0xb0,0xb1,0xb2,0xb3,0xa0,0xa1,0xa2,0xa3,
- 0x90,0x91,0x92,0x93,EOT},
+ 0xc1,0xc2,0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xa0,
+ 0xa1,0xa2,0xa4,0xa5,0xa6,0xa9,0xab,0xac,0xad,0xae,
+ 0xaf,0x90,0x91,0x92,0x80,0x81,0x82,0x83,EOT},
{0x00,0x00,0x00,0x00,0x00,0x3f,NANA,0x00,0x00,0xff,
NANA,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,0x00,
- 0xff,NANA,0x00,0x0f,NANA,0x00,0x00,0x1f,NANA,0x00,
- 0x00,0x3f,NANA,0x00,EOT}},
- {0x7, "BSEL",
- {0x30,0x60,0x61,0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT},
- {0x00,0x00,0x00,0x01,0x00,0x00,NANA,0x00,0x0a,0x00,EOT}},
- {0xa, "PME, ACPI",
- {0x30,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xfe,0xff,EOT},
- {0x00,0x00,0x00,NANA,NANA,0x06,0x1c,0x1f,0x86,0x00,0x00,0x00,0x00,EOT}},
- {EOT}}},
+ 0xff,NANA,0x00,0x0f,NANA,0x00,0x00,0x00,0x00,0x00,
+ 0x1f,NANA,0x00,0x00,0x00,0x00,0x00,0xe0,0x00,0x00,
+ 0x40,0x00,0xff,NANA,0x00,0xff,NANA,0x00,EOT}},
+ {0x7, "WDT",
+ {0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT},
+ {0x01,0x00,0x00,NANA,0x00,0x0a,0x00,EOT}},
+ {0x8, "CIR",
+ {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf8,0xf9,0xfa,0xfb,
+ 0xfc,0xfd,0xfe,EOT},
+ {0x00,0x00,0x00,0x00,NANA,NANA,0x00,0x00,0x80,0x3b,
+ 0x00,0x00,0x00,EOT}},
+ {0xa, "PME, ACPI, and ERP Power Saving",
+ {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
+ 0xe9,0xec,0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,
+ 0xf6,0xf7,0xf8,0xf9,0xfa,0xfc,0xfe,EOT},
+ {0x00,0x00,0xcc,0x3c,0x13,0x09,0xc7,0x09,0x63,0x08,
+ 0x0f,0x00,0x00,0x00,0x00,NANA,0x00,NANA,0x06,0x1c,
+ 0x1f,0x86,0x00,0x00,0x00,0x07,0x00,EOT}},
{0x2307, "F71889", {
/* We assume reserved bits are read as 0. */
{NOLDN, NULL,