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diff --git a/util/romcc/romcc.1 b/util/romcc/romcc.1 deleted file mode 100644 index a18a07c0a7..0000000000 --- a/util/romcc/romcc.1 +++ /dev/null @@ -1,244 +0,0 @@ -.TH ROMCC 1 "September 19, 2006" -.SH NAME -romcc \- compile C programs into binaries that don't use any RAM -.SH SYNOPSIS -.B romcc -[OPTIONS] -<source>.c -.SH DESCRIPTION -.B romcc -is a C compiler which produces binaries which do not rely on RAM, but -instead only use CPU registers. -.PP -It is prominently used in the coreboot project to compile C code which -needs to run before the firmware has initialized the RAM, but can be -used for other purposes, too. -.SH OPTIONS -.TP -.B "\-o" <filename> -Output file name. -.TP -.B "\-f<option>" -Specify a generic compiler option. -.TP -.B "\-m<option>" -Specify an architecture-dependent compiler option. -.TP -.B "\-\-" -Specify that this is the last option. -.SH "GENERIC COMPILER OPTIONS" -.B "\-O" -.TP -.B "\-O2" -.TP -.B "\-E" -.TP -.B "\-ftrigraphs" -.TP -.B "\-fno-trigraphs" -.TP -.B "\-fpp-only" -.TP -.B "\-fno-pp-only" -.TP -.B "\-feliminate-inefectual-code" -.TP -.B "\-fno-eliminate-inefectual-code" -.TP -.B "\-fsimplify" -.TP -.B "\-fno-simplify" -.TP -.B "\-fscc-transform" -.TP -.B "\-fno-scc-transform" -.TP -.B "\-fsimplify-op" -.TP -.B "\-fno-simplify-op" -.TP -.B "\-fsimplify-phi" -.TP -.B "\-fno-simplify-phi" -.TP -.B "\-fsimplify-label" -.TP -.B "\-fno-simplify-label" -.TP -.B "\-fsimplify-branch" -.TP -.B "\-fno-simplify-branch" -.TP -.B "\-fsimplify-copy" -.TP -.B "\-fno-simplify-copy" -.TP -.B "\-fsimplify-arith" -.TP -.B "\-fno-simplify-arith" -.TP -.B "\-fsimplify-shift" -.TP -.B "\-fno-simplify-shift" -.TP -.B "\-fsimplify-bitwise" -.TP -.B "\-fno-simplify-bitwise" -.TP -.B "\-fsimplify-logical" -.TP -.B "\-fno-simplify-logical" -.TP -.B "\-fsimplify-bitfield" -.TP -.B "\-fno-simplify-bitfield" -.TP -.B "\-finline-policy=always" -.TP -.B "\-finline-policy=never" -.TP -.B "\-finline-policy=defaulton" -.TP -.B "\-finline-policy=defaultoff" -.TP -.B "\-finline-policy=nopenalty" -.TP -.B "\-fdebug-all" -.TP -.B "\-fno-debug-all" -.TP -.B "\-fdebug-abort-on-error" -.TP -.B "\-fno-debug-abort-on-error" -.TP -.B "\-fdebug-basic-blocks" -.TP -.B "\-fno-debug-basic-blocks" -.TP -.B "\-fdebug-fdominators" -.TP -.B "\-fno-debug-fdominators" -.TP -.B "\-fdebug-rdominators" -.TP -.B "\-fno-debug-rdominators" -.TP -.B "\-fdebug-triples" -.TP -.B "\-fno-debug-triples" -.TP -.B "\-fdebug-interference" -.TP -.B "\-fno-debug-interference" -.TP -.B "\-fdebug-scc-transform" -.TP -.B "\-fno-debug-scc-transform" -.TP -.B "\-fdebug-scc-transform2" -.TP -.B "\-fno-debug-scc-transform2" -.TP -.B "\-fdebug-rebuild-ssa-form" -.TP -.B "\-fno-debug-rebuild-ssa-form" -.TP -.B "\-fdebug-inline" -.TP -.B "\-fno-debug-inline" -.TP -.B "\-fdebug-live-range-conflicts" -.TP -.B "\-fno-debug-live-range-conflicts" -.TP -.B "\-fdebug-live-range-conflicts2" -.TP -.B "\-fno-debug-live-range-conflicts2" -.TP -.B "\-fdebug-color-graph" -.TP -.B "\-fno-debug-color-graph" -.TP -.B "\-fdebug-color-graph2" -.TP -.B "\-fno-debug-color-graph2" -.TP -.B "\-fdebug-coalescing" -.TP -.B "\-fno-debug-coalescing" -.TP -.B "\-fdebug-coalescing2" -.TP -.B "\-fno-debug-coalescing2" -.TP -.B "\-fdebug-verification" -.TP -.B "\-fno-debug-verification" -.TP -.B "\-fdebug-calls" -.TP -.B "\-fno-debug-calls" -.TP -.B "\-fdebug-calls2" -.TP -.B "\-fno-debug-calls2" -.TP -.B "\-fdebug-tokens" -.TP -.B "\-fno-debug-tokens" -.TP -.B "\-flabel-prefix=<prefix for assembly language labels>" -.TP -.B "\-\-label-prefix=<prefix for assembly language labels>" -.TP -.B "\-I<include path>" -.TP -.B "\-D<macro>[=defn]" -.TP -.B "\-U<macro>" -.SH "ARCHITECTURE-SPECIFIC COMPILER OPTIONS" -.B "\-mmmx" -.TP -.B "\-mno-mmx" -.TP -.B "\-msse" -.TP -.B "\-mno-sse" -.TP -.B "\-mnoop-copy" -.TP -.B "\-mno-noop-copy" -.TP -.B "\-mcpu=i386" -.TP -.B "\-mcpu=p2" -.TP -.B "\-mcpu=p3" -.TP -.B "\-mcpu=p4" -.TP -.B "\-mcpu=k7" -.TP -.B "\-mcpu=k8" -.TP -.B "\-mcpu=c3" -.TP -.B "\-mcpu=c3-2" -.SH BUGS -Please report any bugs to https://ticket.coreboot.org/projects/coreboot or the -coreboot mailing list at <coreboot@coreboot.org>. -.SH LICENCE -.B romcc -is covered by the GNU General Public License (GPL), version 2. -.SH SEE ALSO -.BR flashrom (1), -.BR abuild (1). -.SH COPYRIGHT -2003-2006 Eric W. Biederman -.SH AUTHORS -Eric W. Biederman <ebiederman@lnxi.com> -.br -Some contributions by others. -.PP -This manual page was written by Uwe Hermann <uwe@hermann-uwe.de>. -It is licensed under the terms of the GNU GPL (v2 or later). |