8 files changed, 58 insertions, 4 deletions
diff --git a/src/drivers/intel/fsp1_0/cache_as_ram.inc b/src/drivers/intel/fsp1_0/cache_as_ram.inc
index 24de3a8084..045bfb31bc 100644
--- a/src/drivers/intel/fsp1_0/cache_as_ram.inc
+++ b/src/drivers/intel/fsp1_0/cache_as_ram.inc
@@ -47,7 +47,7 @@ find_fsp_ret:
 	jmp   .Lhlt
 
 find_fsp_ok:
-	post_code(0x22)
+	post_code(POST_FSP_TEMP_RAM_INIT)
 
 	/* Calculate entry into FSP */
 	mov   0x30(%ebp), %eax	/* Load TempRamInitEntry */
diff --git a/src/drivers/intel/fsp1_0/fsp_util.c b/src/drivers/intel/fsp1_0/fsp_util.c
index ca381ff7ae..8688ca54ff 100644
--- a/src/drivers/intel/fsp1_0/fsp_util.c
+++ b/src/drivers/intel/fsp1_0/fsp_util.c
@@ -92,6 +92,7 @@ void __attribute__ ((noreturn)) fsp_early_init (FSP_INFO_HEADER *fsp_ptr)
 	/* Call back to romstage for board specific changes */
 	romstage_fsp_rt_buffer_callback(&FspRtBuffer);
 
+	post_code(POST_FSP_MEMORY_INIT);
 	FspInitApi(&FspInitParams);
 
 	/* Should never return. Control will continue from ContinuationFunc */
@@ -321,6 +322,7 @@ static void fsp_after_pci_enum(void *unused)
 {
 	/* This call needs to be done before resource allocation. */
 	printk(BIOS_DEBUG, "FspNotify(EnumInitPhaseAfterPciEnumeration)\n");
+	post_code(POST_FSP_NOTIFY_BEFORE_ENUMERATE);
 	FspNotify(EnumInitPhaseAfterPciEnumeration);
 	printk(BIOS_DEBUG,
 	       "Returned from FspNotify(EnumInitPhaseAfterPciEnumeration)\n");
@@ -334,6 +336,7 @@ static void fsp_finalize(void *unused)
 {
 	printk(BIOS_DEBUG, "FspNotify(EnumInitPhaseReadyToBoot)\n");
 	print_fsp_info();
+	post_code(POST_FSP_NOTIFY_BEFORE_FINALIZE);
 	FspNotify(EnumInitPhaseReadyToBoot);
 	printk(BIOS_DEBUG, "Returned from FspNotify(EnumInitPhaseReadyToBoot)\n");
 }
diff --git a/src/drivers/intel/fsp1_1/after_raminit.S b/src/drivers/intel/fsp1_1/after_raminit.S
index 7f7461e055..85a0a8c200 100644
--- a/src/drivers/intel/fsp1_1/after_raminit.S
+++ b/src/drivers/intel/fsp1_1/after_raminit.S
@@ -31,6 +31,8 @@
 	/* Switch to the stack in RAM */
 	movl	%eax, %esp
 
+	post_code(POST_FSP_TEMP_RAM_EXIT)
+
 	/* Calculate TempRamExit entry into FSP */
 	movl	fih_car, %ebp
 	mov	0x40(%ebp), %eax
diff --git a/src/drivers/intel/fsp1_1/cache_as_ram.inc b/src/drivers/intel/fsp1_1/cache_as_ram.inc
index 7d68f3210f..35abdb48da 100644
--- a/src/drivers/intel/fsp1_1/cache_as_ram.inc
+++ b/src/drivers/intel/fsp1_1/cache_as_ram.inc
@@ -65,7 +65,7 @@ find_fsp_ret:
 	cmp	$CONFIG_FSP_LOC, %eax
 	jbe	halt1
 
-	post_code(0x22)
+	post_code(POST_FSP_TEMP_RAM_INIT)
 
 	/* Calculate entry into FSP */
 	mov	0x30(%ebp), %eax	/* Load TempRamInitEntry */
diff --git a/src/drivers/intel/fsp1_1/fsp_util.c b/src/drivers/intel/fsp1_1/fsp_util.c
index 21239bd6a7..14ad8c6230 100644
--- a/src/drivers/intel/fsp1_1/fsp_util.c
+++ b/src/drivers/intel/fsp1_1/fsp_util.c
@@ -161,8 +161,13 @@ void fsp_notify(u32 phase)
 		fsp_header_ptr->NotifyPhaseEntryOffset);
 	notify_phase_params.Phase = phase;
 
-	timestamp_add_now(phase == EnumInitPhaseReadyToBoot ?
-		TS_FSP_BEFORE_FINALIZE : TS_FSP_BEFORE_ENUMERATE);
+	if (phase == EnumInitPhaseReadyToBoot) {
+		timestamp_add_now(TS_FSP_BEFORE_ENUMERATE);
+		post_code(POST_FSP_NOTIFY_BEFORE_ENUMERATE);
+	} else {
+		timestamp_add_now(TS_FSP_BEFORE_FINALIZE);
+		post_code(POST_FSP_NOTIFY_BEFORE_FINALIZE);
+	}
 
 	status = notify_phase_proc(&notify_phase_params);
 
diff --git a/src/drivers/intel/fsp1_1/raminit.c b/src/drivers/intel/fsp1_1/raminit.c
index 50704a8389..a19f6aec83 100644
--- a/src/drivers/intel/fsp1_1/raminit.c
+++ b/src/drivers/intel/fsp1_1/raminit.c
@@ -122,6 +122,7 @@ void raminit(struct romstage_params *params)
 		fsp_memory_init_params.HobListPtr);
 
 	timestamp_add_now(TS_FSP_MEMORY_INIT_START);
+	post_code(POST_FSP_MEMORY_INIT);
 	status = fsp_memory_init(&fsp_memory_init_params);
 	post_code(0x37);
 	timestamp_add_now(TS_FSP_MEMORY_INIT_END);
diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c
index 15a7cbc095..aa1b658068 100644
--- a/src/drivers/intel/fsp1_1/ramstage.c
+++ b/src/drivers/intel/fsp1_1/ramstage.c
@@ -137,6 +137,7 @@ static void fsp_run_silicon_init(int is_s3_wakeup)
 	timestamp_add_now(TS_FSP_SILICON_INIT_START);
 	printk(BIOS_DEBUG, "Calling FspSiliconInit(0x%p) at 0x%p\n",
 		&silicon_init_params, fsp_silicon_init);
+	post_code(POST_FSP_SILICON_INIT);
 	status = fsp_silicon_init(&silicon_init_params);
 	timestamp_add_now(TS_FSP_SILICON_INIT_END);
 	printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status);
diff --git a/src/include/console/post_codes.h b/src/include/console/post_codes.h
index 44a3ef239a..e6d12430f1 100644
--- a/src/include/console/post_codes.h
+++ b/src/include/console/post_codes.h
@@ -203,6 +203,48 @@
 #define POST_BS_PAYLOAD_BOOT			0x7b
 
 /**
+ * \brief Before calling FSP TempRamInit
+ *
+ * Going to call into FSP binary for TempRamInit phase
+ */
+#define POST_FSP_TEMP_RAM_INIT			0x90
+
+/**
+ * \brief Before calling FSP TempRamExit
+ *
+ * Going to call into FSP binary for TempRamExit phase
+ */
+#define POST_FSP_TEMP_RAM_EXIT			0x91
+
+/**
+ * \brief Before calling FSP MemoryInit
+ *
+ * Going to call into FSP binary for MemoryInit phase
+ */
+#define POST_FSP_MEMORY_INIT			0x92
+
+/**
+ * \brief Before calling FSP SiliconInit
+ *
+ * Going to call into FSP binary for SiliconInit phase
+ */
+#define POST_FSP_SILICON_INIT			0x93
+
+/**
+ * \brief Before calling FSP Notify before resource allocation
+ *
+ * Going to call into FSP binary for Notify phase
+ */
+#define POST_FSP_NOTIFY_BEFORE_ENUMERATE	0x94
+
+/**
+ * \brief Before calling FSP Notify before finalize
+ *
+ * Going to call into FSP binary for Notify phase
+ */
+#define POST_FSP_NOTIFY_BEFORE_FINALIZE		0x95
+
+/**
  * \brief Entry into elf boot
  *
  * This POST code is called right before invoking jmp_to_elf_entry()