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-rw-r--r--src/vendorcode/amd/opensil/genoa_poc/Makefile.mk3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/vendorcode/amd/opensil/genoa_poc/Makefile.mk b/src/vendorcode/amd/opensil/genoa_poc/Makefile.mk
index 70bf44b32d..ca58868da6 100644
--- a/src/vendorcode/amd/opensil/genoa_poc/Makefile.mk
+++ b/src/vendorcode/amd/opensil/genoa_poc/Makefile.mk
@@ -2,8 +2,7 @@
subdirs-y += mpio
-CPPFLAGS_ramstage += -I$(opensil_dir)/Include -I$(opensil_dir)/xUSL -I$(opensil_dir)/xUSL/Include -I$(opensil_dir)/xUSL/FCH -I$(opensil_dir)/xUSL/FCH/Common -I$(opensil_dir)/xSIM -I$(opensil_dir)/xPRF
-CPPFLAGS_romstage += -I$(opensil_dir)/Include -I$(opensil_dir)/xUSL -I$(opensil_dir)/xUSL/Include -I$(opensil_dir)/xSIM -I$(opensil_dir)/xPRF
+CPPFLAGS_common += -I$(opensil_dir)/Include -I$(opensil_dir)/xUSL -I$(opensil_dir)/xUSL/Include -I$(opensil_dir)/xUSL/FCH -I$(opensil_dir)/xUSL/FCH/Common -I$(opensil_dir)/xSIM -I$(opensil_dir)/xPRF
romstage-y += opensil_console.c
romstage-y += romstage.c