3 files changed, 30 insertions, 25 deletions
diff --git a/src/soc/intel/common/block/cse/Makefile.mk b/src/soc/intel/common/block/cse/Makefile.mk
index 653d67463c..d41d735462 100644
--- a/src/soc/intel/common/block/cse/Makefile.mk
+++ b/src/soc/intel/common/block/cse/Makefile.mk
@@ -11,6 +11,8 @@ smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += disable_heci.c
 ramstage-$(CONFIG_SOC_INTEL_CSE_SET_EOP) += cse_eop.c
 romstage-$(CONFIG_SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY) += telemetry.c
 
+romstage-$(CONFIG_SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD) += cse_sync_payload.c
+
 ifeq ($(CONFIG_STITCH_ME_BIN),y)
 
 CSE_BP1_BIN := $(objcse)/cse_bp1.bin
diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c
index 4e3a44661d..6c4fed7c41 100644
--- a/src/soc/intel/common/block/cse/cse_lite.c
+++ b/src/soc/intel/common/block/cse/cse_lite.c
@@ -1542,31 +1542,6 @@ static void store_ish_version(void)
 	}
 }
 
-static void preram_create_cbmem_cse_info(int is_recovery)
-{
-	if (!CONFIG(SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD))
-		return;
-
-	/*
-	 * CBMEM_ID_CSE_INFO will be used by the payload to -
-	 * 1. Avoid reading ISH firmware version on consecutive boots.
-	 * 2. Track state of PSR data during CSE downgrade operation.
-	 */
-	void *temp = cbmem_add(CBMEM_ID_CSE_INFO, sizeof(struct cse_specific_info));
-	if (!temp)
-		printk(BIOS_ERR, "cse_lite: Couldn't create CBMEM_ID_CSE_INFO\n");
-
-	/*
-	 * CBMEM_ID_CSE_BP_INFO will be used by the payload to avoid reading CSE
-	 * boot partition information on consecutive boots.
-	 */
-	temp = cbmem_add(CBMEM_ID_CSE_BP_INFO, sizeof(struct get_bp_info_rsp));
-	if (!temp)
-		printk(BIOS_ERR, "cse_lite: Couldn't create CBMEM_ID_CSE_BP_INFO\n");
-}
-
-CBMEM_CREATION_HOOK(preram_create_cbmem_cse_info);
-
 static void ramstage_cse_misc_ops(void *unused)
 {
 	if (acpi_get_sleep_type() == ACPI_S3)
diff --git a/src/soc/intel/common/block/cse/cse_sync_payload.c b/src/soc/intel/common/block/cse/cse_sync_payload.c
new file mode 100644
index 0000000000..5c816d1366
--- /dev/null
+++ b/src/soc/intel/common/block/cse/cse_sync_payload.c
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <cbmem.h>
+#include <console/console.h>
+#include <intelblocks/cse.h>
+#include <intelblocks/cse_lite.h>
+
+static void preram_create_cbmem_cse_info_for_payload(int is_recovery)
+{
+	/*
+	 * CBMEM_ID_CSE_INFO will be used by the payload to -
+	 * 1. Keep ISH firmware version on consecutive boots.
+	 * 2. Track state of PSR data during CSE downgrade operation.
+	 */
+	void *temp = cbmem_add(CBMEM_ID_CSE_INFO, sizeof(struct cse_specific_info));
+	if (!temp)
+		printk(BIOS_ERR, "cse_lite: Couldn't create CBMEM_ID_CSE_INFO\n");
+
+	/*
+	 * CBMEM_ID_CSE_BP_INFO will be used by the payload to keep CSE
+	 * boot partition information on consecutive boots.
+	 */
+	temp = cbmem_add(CBMEM_ID_CSE_BP_INFO, sizeof(struct get_bp_info_rsp));
+	if (!temp)
+		printk(BIOS_ERR, "cse_lite: Couldn't create CBMEM_ID_CSE_BP_INFO\n");
+}
+
+CBMEM_CREATION_HOOK(preram_create_cbmem_cse_info_for_payload);