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-rw-r--r--src/vendorcode/amd/agesa/f15tn/Makefile.inc1
-rw-r--r--src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.c10
-rw-r--r--src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.h11
3 files changed, 21 insertions, 1 deletions
diff --git a/src/vendorcode/amd/agesa/f15tn/Makefile.inc b/src/vendorcode/amd/agesa/f15tn/Makefile.inc
index 4b44ceffdc..278cb8e9e4 100644
--- a/src/vendorcode/amd/agesa/f15tn/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f15tn/Makefile.inc
@@ -230,6 +230,7 @@ libagesa-y += Proc/GNB/Modules/GnbInitTN/PcieMidInitTN.c
libagesa-y += Proc/GNB/Modules/GnbInitTN/PciePostInitTN.c
libagesa-y += Proc/GNB/Modules/GnbInitTN/PciePowerGateTN.c
libagesa-y += Proc/GNB/Modules/GnbInitTN/PcieTablesTN.c
+libagesa-y += Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.c
libagesa-y += Proc/GNB/Modules/GnbIommuIvrs/GnbIommuIvrs.c
libagesa-y += Proc/GNB/Modules/GnbIvrsLib/GnbIvrsLib.c
libagesa-y += Proc/GNB/Modules/GnbMSocketLib/GnbMSocketLib.c
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.c b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.c
index 5ed82bca04..6869ab9144 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.c
@@ -36,6 +36,8 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "GnbIommuScratch.h"
+
#include "AGESA.h"
#include "Ids.h"
#include "S3SaveState.h"
@@ -83,8 +85,14 @@ GnbIommuScratchMemoryRangeInterface (
return AGESA_FATAL;
}
- AddressLow = (((UINT32) ((UINT64) AllocHeapParams.BufferPtr)) + 0x3F) & D0F0x98_x27_IOMMUUrAddr_31_6__MASK;
+/*Align the address to 64 bytes boundary */
+#ifdef __x86_64__
+ AddressLow = (((UINT32) ((UINT64) AllocHeapParams.BufferPtr)) + 0x3F) & D0F0x98_x27_IOMMUUrAddr_31_6__MASK;
AddressHigh = ((UINT32) (((UINT64) AllocHeapParams.BufferPtr) >> 32)) & D0F0x98_x26_IOMMUUrAddr_39_32__MASK;
+#else
+ AddressLow = ((((UINT32) AllocHeapParams.BufferPtr)) + 0x3F) & D0F0x98_x27_IOMMUUrAddr_31_6__MASK;
+ AddressHigh = 0;
+#endif
GnbHandle = GnbGetHandle (StdHeader);
while (GnbHandle != NULL) {
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.h b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.h
new file mode 100644
index 0000000000..a01b16707b
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.h
@@ -0,0 +1,11 @@
+#ifndef _GNBIOMMUSCRATCH_H_
+#define _GNBIOMMUSCRATCH_H_
+
+#include "AGESA.h"
+
+AGESA_STATUS
+GnbIommuScratchMemoryRangeInterface (
+ IN AMD_CONFIG_PARAMS *StdHeader
+ );
+
+#endif /* _GNBIOMMUSCRATCH_H_ */