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-rw-r--r--src/soc/amd/common/block/data_fabric/Kconfig5
-rw-r--r--src/soc/amd/common/block/data_fabric/Makefile.inc5
-rw-r--r--src/soc/amd/common/block/data_fabric/data_fabric_def.h20
-rw-r--r--src/soc/amd/common/block/data_fabric/data_fabric_helper.c31
-rw-r--r--src/soc/amd/common/block/include/amdblocks/data_fabric.h12
-rw-r--r--src/soc/amd/picasso/Kconfig1
-rw-r--r--src/soc/amd/picasso/agesa_acpi.c1
-rw-r--r--src/soc/amd/picasso/data_fabric.c24
-rw-r--r--src/soc/amd/picasso/include/soc/data_fabric.h16
9 files changed, 76 insertions, 39 deletions
diff --git a/src/soc/amd/common/block/data_fabric/Kconfig b/src/soc/amd/common/block/data_fabric/Kconfig
new file mode 100644
index 0000000000..42cd6ec070
--- /dev/null
+++ b/src/soc/amd/common/block/data_fabric/Kconfig
@@ -0,0 +1,5 @@
+config SOC_AMD_COMMON_BLOCK_DATA_FABRIC
+ bool
+ help
+ Select this option to add data fabric configuration related
+ functionality to the build.
diff --git a/src/soc/amd/common/block/data_fabric/Makefile.inc b/src/soc/amd/common/block/data_fabric/Makefile.inc
new file mode 100644
index 0000000000..3938af122e
--- /dev/null
+++ b/src/soc/amd/common/block/data_fabric/Makefile.inc
@@ -0,0 +1,5 @@
+ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_DATA_FABRIC),y)
+
+ramstage-y += data_fabric_helper.c
+
+endif # CONFIG_SOC_AMD_COMMON_BLOCK_DATA_FABRIC
diff --git a/src/soc/amd/common/block/data_fabric/data_fabric_def.h b/src/soc/amd/common/block/data_fabric/data_fabric_def.h
new file mode 100644
index 0000000000..2076d1633c
--- /dev/null
+++ b/src/soc/amd/common/block/data_fabric/data_fabric_def.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef AMD_BLOCK_DATA_FABRIC_DEF_H
+#define AMD_BLOCK_DATA_FABRIC_DEF_H
+
+#define DF_FICAA_BIOS 0x5C
+#define DF_FICAD_LO 0x98
+#define DF_FICAD_HI 0x9C
+
+#define DF_IND_CFG_INST_ACC_EN (1 << 0)
+#define DF_IND_CFG_ACC_REG_SHIFT 2
+#define DF_IND_CFG_ACC_REG_MASK (0x1ff << DF_IND_CFG_ACC_REG_SHIFT)
+#define DF_IND_CFG_ACC_FUN_SHIFT 11
+#define DF_IND_CFG_ACC_FUN_MASK (0x7 << DF_IND_CFG_ACC_FUN_SHIFT)
+#define DF_IND_CFG_64B_EN_SHIFT 14
+#define DF_IND_CFG_64B_EN (0x1 << DF_IND_CFG_64B_EN_SHIFT)
+#define DF_IND_CFG_INST_ID_SHIFT 16
+#define DF_IND_CFG_INST_ID_MASK (0xff << DF_IND_CFG_INST_ID_SHIFT)
+
+#endif /* AMD_BLOCK_DATA_FABRIC_DEF_H */
diff --git a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c
new file mode 100644
index 0000000000..e8e02d8eb1
--- /dev/null
+++ b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <amdblocks/data_fabric.h>
+#include <amdblocks/pci_devs.h>
+#include <device/pci_ops.h>
+#include <soc/pci_devs.h>
+#include <types.h>
+#include "data_fabric_def.h"
+
+static void data_fabric_set_indirect_address(uint8_t func, uint16_t reg, uint8_t instance_id)
+{
+ uint32_t fabric_indirect_access_reg = DF_IND_CFG_INST_ACC_EN;
+ /* Register offset field [10:2] in this register corresponds to [10:2] of the
+ requested offset. */
+ fabric_indirect_access_reg |= reg & DF_IND_CFG_ACC_REG_MASK;
+ fabric_indirect_access_reg |=
+ (func << DF_IND_CFG_ACC_FUN_SHIFT) & DF_IND_CFG_ACC_FUN_MASK;
+ fabric_indirect_access_reg |= instance_id << DF_IND_CFG_INST_ID_SHIFT;
+ pci_write_config32(SOC_DF_F4_DEV, DF_FICAA_BIOS, fabric_indirect_access_reg);
+}
+
+uint32_t data_fabric_read32(uint8_t function, uint16_t reg, uint8_t instance_id)
+{
+ if (instance_id == BROADCAST_FABRIC_ID)
+ /* No bit masking required. Macros will apply mask to values. */
+ return pci_read_config32(_SOC_DEV(DF_DEV, function), reg);
+
+ /* non-broadcast data fabric accesses need to be done via indirect access */
+ data_fabric_set_indirect_address(function, reg, instance_id);
+ return pci_read_config32(SOC_DF_F4_DEV, DF_FICAD_LO);
+}
diff --git a/src/soc/amd/common/block/include/amdblocks/data_fabric.h b/src/soc/amd/common/block/include/amdblocks/data_fabric.h
new file mode 100644
index 0000000000..606d56419f
--- /dev/null
+++ b/src/soc/amd/common/block/include/amdblocks/data_fabric.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef AMD_BLOCK_DATA_FABRIC_H
+#define AMD_BLOCK_DATA_FABRIC_H
+
+#include <stdint.h>
+
+#define BROADCAST_FABRIC_ID 0xff
+
+uint32_t data_fabric_read32(uint8_t function, uint16_t reg, uint8_t instance_id);
+
+#endif /* AMD_BLOCK_DATA_FABRIC_H */
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index 16a12972b4..495d28fd91 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -29,6 +29,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_AMD_COMMON_BLOCK_ACPIMMIO
select SOC_AMD_COMMON_BLOCK_AOAC
select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS
+ select SOC_AMD_COMMON_BLOCK_DATA_FABRIC
select SOC_AMD_COMMON_BLOCK_GRAPHICS
select SOC_AMD_COMMON_BLOCK_HAS_ESPI
select SOC_AMD_COMMON_BLOCK_HAS_ESPI_SUB_DECODE
diff --git a/src/soc/amd/picasso/agesa_acpi.c b/src/soc/amd/picasso/agesa_acpi.c
index 899e005120..758a35f043 100644
--- a/src/soc/amd/picasso/agesa_acpi.c
+++ b/src/soc/amd/picasso/agesa_acpi.c
@@ -13,6 +13,7 @@
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <amdblocks/cpu.h>
+#include <amdblocks/data_fabric.h>
#include <amdblocks/ioapic.h>
#include <soc/data_fabric.h>
#include <soc/pci_devs.h>
diff --git a/src/soc/amd/picasso/data_fabric.c b/src/soc/amd/picasso/data_fabric.c
index 82cece975e..7b4283aeab 100644
--- a/src/soc/amd/picasso/data_fabric.c
+++ b/src/soc/amd/picasso/data_fabric.c
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_device.h>
+#include <amdblocks/data_fabric.h>
#include <console/console.h>
#include <cpu/x86/lapic_def.h>
#include <device/device.h>
@@ -167,26 +168,3 @@ static const struct pci_driver data_fabric_driver __pci_driver = {
.vendor = PCI_VENDOR_ID_AMD,
.devices = pci_device_ids,
};
-
-static void data_fabric_set_indirect_address(uint8_t func, uint16_t reg, uint8_t instance_id)
-{
- uint32_t fabric_indirect_access_reg = DF_IND_CFG_INST_ACC_EN;
- /* Register offset field [10:2] in this register corresponds to [10:2] of the
- requested offset. */
- fabric_indirect_access_reg |= reg & DF_IND_CFG_ACC_REG_MASK;
- fabric_indirect_access_reg |=
- (func << DF_IND_CFG_ACC_FUN_SHIFT) & DF_IND_CFG_ACC_FUN_MASK;
- fabric_indirect_access_reg |= instance_id << DF_IND_CFG_INST_ID_SHIFT;
- pci_write_config32(SOC_DF_F4_DEV, DF_FICAA_BIOS, fabric_indirect_access_reg);
-}
-
-uint32_t data_fabric_read32(uint8_t function, uint16_t reg, uint8_t instance_id)
-{
- if (instance_id == BROADCAST_FABRIC_ID)
- /* No bit masking required. Macros will apply mask to values. */
- return pci_read_config32(_SOC_DEV(DF_DEV, function), reg);
-
- /* non-broadcast data fabric accesses need to be done via indirect access */
- data_fabric_set_indirect_address(function, reg, instance_id);
- return pci_read_config32(SOC_DF_F4_DEV, DF_FICAD_LO);
-}
diff --git a/src/soc/amd/picasso/include/soc/data_fabric.h b/src/soc/amd/picasso/include/soc/data_fabric.h
index 4dae6b4fa2..3a19318cfd 100644
--- a/src/soc/amd/picasso/include/soc/data_fabric.h
+++ b/src/soc/amd/picasso/include/soc/data_fabric.h
@@ -7,7 +7,6 @@
/* D18F0 - Fabric Configuration registers */
#define IOMS0_FABRIC_ID 9
-#define BROADCAST_FABRIC_ID 0xff
#define D18F0_VGAEN 0x80
#define VGA_ADDR_ENABLE BIT(0)
@@ -57,21 +56,6 @@
#define DF_DRAM_LIMIT(dram_map_pair) ((dram_map_pair) * 2 * sizeof(uint32_t) \
+ D18F0_DRAM_LIMIT0)
-#define DF_FICAA_BIOS 0x5C
-#define DF_FICAD_LO 0x98
-#define DF_FICAD_HI 0x9C
-
-#define DF_IND_CFG_INST_ACC_EN (1 << 0)
-#define DF_IND_CFG_ACC_REG_SHIFT 2
-#define DF_IND_CFG_ACC_REG_MASK (0x1ff << DF_IND_CFG_ACC_REG_SHIFT)
-#define DF_IND_CFG_ACC_FUN_SHIFT 11
-#define DF_IND_CFG_ACC_FUN_MASK (0x7 << DF_IND_CFG_ACC_FUN_SHIFT)
-#define DF_IND_CFG_64B_EN_SHIFT 14
-#define DF_IND_CFG_64B_EN (0x1 << DF_IND_CFG_64B_EN_SHIFT)
-#define DF_IND_CFG_INST_ID_SHIFT 16
-#define DF_IND_CFG_INST_ID_MASK (0xff << DF_IND_CFG_INST_ID_SHIFT)
-
void data_fabric_set_mmio_np(void);
-uint32_t data_fabric_read32(uint8_t function, uint16_t reg, uint8_t instance_id);
#endif /* AMD_PICASSO_DATA_FABRIC_H */