4 files changed, 59 insertions, 0 deletions

diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index af1a04934c..5a6df8d758 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -295,6 +295,10 @@ config SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ
 config CPU_XTAL_HZ
 	default 38400000
 
+config SOC_INTEL_UFS_CLK_FREQ_HZ
+	int
+	default 19200000
+
 config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ
 	int
 	default 133
diff --git a/src/soc/intel/common/block/scs/Kconfig b/src/soc/intel/common/block/scs/Kconfig
index 192425c4a0..6b5f49ea67 100644
--- a/src/soc/intel/common/block/scs/Kconfig
+++ b/src/soc/intel/common/block/scs/Kconfig
@@ -19,3 +19,10 @@ config SOC_INTEL_COMMON_MMC_OVERRIDE
 	help
 	  Override the MMC settings after FSP-S.
 	  It should be used only when there is no FSP UPDs for certain setting.
+
+config SOC_INTEL_COMMON_UFS_SUPPORT
+	bool
+	default n
+	help
+	  Enable UFS support. Should be enabled when a particular SoC supports
+	  boot from UFS.
diff --git a/src/soc/intel/common/block/scs/Makefile.inc b/src/soc/intel/common/block/scs/Makefile.inc
index 0b77f5fa21..aa5f2b5d95 100644
--- a/src/soc/intel/common/block/scs/Makefile.inc
+++ b/src/soc/intel/common/block/scs/Makefile.inc
@@ -2,4 +2,5 @@ ifneq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_N),y)
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SCS) += sd.c
 endif
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SCS) += mmc.c
+ramstage-$(CONFIG_SOC_INTEL_COMMON_UFS_SUPPORT) += ufs.c
 romstage-$(CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE) += early_mmc.c
diff --git a/src/soc/intel/common/block/scs/ufs.c b/src/soc/intel/common/block/scs/ufs.c
new file mode 100644
index 0000000000..e70c87bfff
--- /dev/null
+++ b/src/soc/intel/common/block/scs/ufs.c
@@ -0,0 +1,47 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#include <acpi/acpi_device.h>
+#include <acpi/acpigen.h>
+#include <acpi/acpigen_pci.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+
+#if CONFIG(HAVE_ACPI_TABLES)
+static void ufs_fill_ssdt(const struct device *dev)
+{
+	struct acpi_dp *dsd;
+
+	const char *scope = acpi_device_scope(dev);
+
+	acpigen_write_scope(scope);
+	acpigen_write_device("UFS");
+	acpigen_write_ADR_pci_device(dev);
+	acpigen_write_name_string("_DDN", "UFS Controller");
+
+	dsd = acpi_dp_new_table("_DSD");
+	acpi_dp_add_integer(dsd, "ref-clk-freq", CONFIG_SOC_INTEL_UFS_CLK_FREQ_HZ);
+	acpi_dp_write(dsd);
+	acpigen_write_device_end();
+	acpigen_pop_len();
+}
+#endif
+
+static struct device_operations dev_ops = {
+	.read_resources		= pci_dev_read_resources,
+	.set_resources		= pci_dev_set_resources,
+	.enable_resources	= pci_dev_enable_resources,
+#if CONFIG(HAVE_ACPI_TABLES)
+	.acpi_fill_ssdt		= ufs_fill_ssdt,
+#endif
+	.ops_pci		= &pci_dev_ops_pci,
+};
+
+static const unsigned short pci_device_ids[] = {
+	PCI_DID_INTEL_ADP_UFS,
+	0
+};
+
+static const struct pci_driver pch_ufs __pci_driver = {
+	.ops		= &dev_ops,
+	.vendor		= PCI_VID_INTEL,
+	.devices	= pci_device_ids
+};