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-rw-r--r--src/drivers/intel/fsp2_0/Kconfig6
-rw-r--r--src/drivers/intel/fsp2_0/include/fsp/api.h4
-rw-r--r--src/drivers/intel/fsp2_0/logo.c25
-rw-r--r--src/drivers/intel/fsp2_0/silicon_init.c21
-rw-r--r--src/soc/intel/apollolake/Kconfig1
-rw-r--r--src/soc/intel/apollolake/chip.c6
-rw-r--r--src/soc/intel/cannonlake/Kconfig1
-rw-r--r--src/soc/intel/cannonlake/fsp_params.c7
-rw-r--r--src/soc/intel/skylake/Kconfig1
-rw-r--r--src/soc/intel/skylake/chip.c7
10 files changed, 58 insertions, 21 deletions
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index 824fd0b896..7ce7838642 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -156,10 +156,14 @@ config FSP_PEIM_TO_PEIM_INTERFACE
is limited till EFI_PEI_MP_SERVICE_PPI and this option might be
useful to add further PPI if required.
+config HAVE_FSP_LOGO_SUPPORT
+ bool
+ default n
+
config FSP2_0_DISPLAY_LOGO
bool "Enable logo"
default n
- depends on HAVE_FSP_GOP
+ depends on HAVE_FSP_LOGO_SUPPORT
help
Uses the FSP to display the boot logo. This method supports a
BMP file only. The uncompressed size can be up to 1 MB. The logo can be compressed
diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h
index fb42c7647b..60adb98513 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/api.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/api.h
@@ -70,13 +70,15 @@ uint8_t fsp_memory_mainboard_version(void);
uint8_t fsp_memory_soc_version(void);
/* Load logo to be displayed by FSP */
-void load_logo(FSPS_UPD *supd);
+const struct cbmem_entry *fsp_load_logo(UINT32 *logo_ptr, UINT32 *logo_size);
/* Callback after processing FSP notify */
void platform_fsp_notify_status(enum fsp_notify_phase phase);
/* Initialize memory margin analysis settings. */
void setup_mma(FSP_M_CONFIG *memory_cfg);
+/* Update the SOC specific logo param and load the logo. */
+const struct cbmem_entry *soc_load_logo(FSPS_UPD *supd);
/* Update the SOC specific memory config param for mma. */
void soc_update_memory_params_for_mma(FSP_M_CONFIG *memory_cfg,
struct mma_config_param *mma_cfg);
diff --git a/src/drivers/intel/fsp2_0/logo.c b/src/drivers/intel/fsp2_0/logo.c
index feeec3b995..ba2b5dcbcd 100644
--- a/src/drivers/intel/fsp2_0/logo.c
+++ b/src/drivers/intel/fsp2_0/logo.c
@@ -11,17 +11,24 @@
* GNU General Public License for more details.
*/
-#include <soc/ramstage.h>
-#include <console/console.h>
+#include <cbfs.h>
+#include <cbmem.h>
#include <fsp/api.h>
-#include <include/cbfs.h>
-void load_logo(FSPS_UPD *supd)
+const struct cbmem_entry *fsp_load_logo(UINT32 *logo_ptr, UINT32 *logo_size)
{
- FSP_S_CONFIG *params = &supd->FspsConfig;
+ const struct cbmem_entry *logo_entry = NULL;
+ void *logo_buffer;
- params->LogoSize = cbfs_boot_load_file("logo.bmp", (void *)params->LogoPtr,
- params->LogoSize, CBFS_TYPE_RAW);
- if (!params->LogoSize)
- params->LogoPtr = 0;
+ logo_entry = cbmem_entry_add(CBMEM_ID_FSP_LOGO, 1 * MiB);
+ if (logo_entry) {
+ logo_buffer = cbmem_entry_start(logo_entry);
+ if (logo_buffer) {
+ *logo_size = cbfs_boot_load_file("logo.bmp", (void *)logo_buffer,
+ 1 * MiB, CBFS_TYPE_RAW);
+ if (logo_size)
+ *logo_ptr = (UINT32)logo_buffer;
+ }
+ }
+ return (logo_entry);
}
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
index ebdbdbf2e6..33d15afad6 100644
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -34,7 +34,7 @@ static void do_silicon_init(struct fsp_header *hdr)
fsp_silicon_init_fn silicon_init;
uint32_t status;
uint8_t postcode;
- const struct cbmem_entry *logo_entry;
+ const struct cbmem_entry *logo_entry = NULL;
supd = (FSPS_UPD *) (hdr->cfg_region_offset + hdr->image_base);
@@ -57,14 +57,9 @@ static void do_silicon_init(struct fsp_header *hdr)
/* Give SoC/mainboard a chance to populate entries */
platform_fsp_silicon_init_params_cb(upd);
-#if (CONFIG(HAVE_FSP_GOP))
- if (CONFIG(FSP2_0_DISPLAY_LOGO)) {
- upd->FspsConfig.LogoSize = 1 * MiB;
- logo_entry = cbmem_entry_add(CBMEM_ID_FSP_LOGO, upd->FspsConfig.LogoSize);
- upd->FspsConfig.LogoPtr = (UINT32)cbmem_entry_start(logo_entry);
- load_logo(upd);
- }
-#endif
+ /* Populate logo related entries */
+ if (CONFIG(FSP2_0_DISPLAY_LOGO))
+ logo_entry = soc_load_logo(upd);
/* Call SiliconInit */
silicon_init = (void *) (hdr->image_base +
@@ -77,7 +72,7 @@ static void do_silicon_init(struct fsp_header *hdr)
timestamp_add_now(TS_FSP_SILICON_INIT_END);
post_code(POST_FSP_SILICON_EXIT);
- if (CONFIG(FSP2_0_DISPLAY_LOGO))
+ if (logo_entry)
cbmem_entry_remove(logo_entry);
fsp_debug_after_silicon_init(status);
@@ -160,3 +155,9 @@ void fsp_silicon_init(bool s3wake)
fsps_load(s3wake);
do_silicon_init(&fsps_hdr);
}
+
+/* Load bmp and set FSP parameters, fsp_load_logo can be used */
+__weak const struct cbmem_entry *soc_load_logo(FSPS_UPD *supd)
+{
+ return NULL;
+}
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index a39765f8f6..2f4ebb0540 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -102,6 +102,7 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_CF9_RESET_PREPARE
select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
select HAVE_FSP_GOP
+ select HAVE_FSP_LOGO_SUPPORT
select NO_UART_ON_SUPERIO
select INTEL_GMA_ACPI
select INTEL_GMA_SWSMISCI
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 6c195bb6fd..907149a829 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -879,4 +879,10 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *silconfig)
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
}
+/* Handle FSP logo params */
+const struct cbmem_entry *soc_load_logo(FSPS_UPD *supd)
+{
+ return fsp_load_logo(&supd->FspsConfig.LogoPtr, &supd->FspsConfig.LogoSize);
+}
+
BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, spi_flash_init_cb, NULL);
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 8820508259..26bae068df 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -66,6 +66,7 @@ config CPU_SPECIFIC_OPTIONS
select FSP_M_XIP
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
+ select HAVE_FSP_LOGO_SUPPORT
select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_SMI_HANDLER
select IDT_IN_EVERY_STAGE
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index dfc7e22522..dc4a2a841e 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
@@ -483,3 +484,9 @@ const pci_devfn_t *soc_lpss_controllers_list(size_t *size)
*size = ARRAY_SIZE(serial_io_dev);
return serial_io_dev;
}
+
+/* Handle FSP logo params */
+const struct cbmem_entry *soc_load_logo(FSPS_UPD *supd)
+{
+ return fsp_load_logo(&supd->FspsConfig.LogoPtr, &supd->FspsConfig.LogoSize);
+}
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 5fc2a2d240..d90fb6b9fb 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -33,6 +33,7 @@ config CPU_SPECIFIC_OPTIONS
select FSP_M_XIP
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
+ select HAVE_FSP_LOGO_SUPPORT
select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_SMI_HANDLER
select INTEL_CAR_NEM_ENHANCED
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index de11a9e1c7..8e86156a07 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -15,6 +15,7 @@
#include <bootmode.h>
#include <bootstate.h>
+#include <cbmem.h>
#include <fsp/api.h>
#include <arch/acpi.h>
#include <console/console.h>
@@ -416,3 +417,9 @@ __weak void mainboard_silicon_init_params(FSP_S_CONFIG *params)
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
}
+
+/* Handle FSP logo params */
+const struct cbmem_entry *soc_load_logo(FSPS_UPD *supd)
+{
+ return fsp_load_logo(&supd->FspsConfig.LogoPtr, &supd->FspsConfig.LogoSize);
+}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-22 09:38:32 +0000