diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/drivers/intel/gma/opregion.c | 16 | ||||
| -rw-r--r-- | src/drivers/intel/gma/opregion.h | 1 |
2 files changed, 17 insertions, 0 deletions
diff --git a/src/drivers/intel/gma/opregion.c b/src/drivers/intel/gma/opregion.c index ab9093b82f..721a5d8239 100644 --- a/src/drivers/intel/gma/opregion.c +++ b/src/drivers/intel/gma/opregion.c @@ -18,6 +18,8 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> +#include <console/console.h> +#include <cbmem.h> #include "opregion.h" /* Write ASLS PCI register and prepare SWSCI register. */ @@ -46,3 +48,17 @@ void intel_gma_opregion_register(uintptr_t opregion) reg16 |= SMISCISEL; pci_write_config16(igd, SWSCI, reg16); } + +/* Restore ASLS register on S3 resume and prepare SWSCI. */ +void intel_gma_restore_opregion(void) +{ + if (acpi_is_wakeup_s3()) { + const void *const gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + uintptr_t aslb; + + if (gnvs && (aslb = gma_get_gnvs_aslb(gnvs))) + intel_gma_opregion_register(aslb); + else + printk(BIOS_ERR, "Error: GNVS or ASLB not set.\n"); + } +} diff --git a/src/drivers/intel/gma/opregion.h b/src/drivers/intel/gma/opregion.h index 09fa24180b..7c7107a8e7 100644 --- a/src/drivers/intel/gma/opregion.h +++ b/src/drivers/intel/gma/opregion.h @@ -246,6 +246,7 @@ typedef struct { } __attribute__((packed)) optionrom_vbt_t; void intel_gma_opregion_register(uintptr_t opregion); +void intel_gma_restore_opregion(void); uintptr_t gma_get_gnvs_aslb(const void *gnvs); void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb); |