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-rw-r--r--src/include/boot/coreboot_tables.h2
-rw-r--r--src/lib/coreboot_table.c4
-rw-r--r--src/soc/mediatek/common/pcie.c2
-rw-r--r--src/soc/qualcomm/common/pcie_common.c2
4 files changed, 5 insertions, 5 deletions
diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h
index 4aab80e866..e209e4b2de 100644
--- a/src/include/boot/coreboot_tables.h
+++ b/src/include/boot/coreboot_tables.h
@@ -22,7 +22,7 @@ void lb_add_gpios(struct lb_gpios *gpios, const struct lb_gpio *gpio_table,
enum cb_err fill_lb_serial(struct lb_serial *serial);
void lb_add_console(uint16_t consoletype, void *data);
-enum cb_err lb_fill_pcie(struct lb_pcie *pcie);
+enum cb_err fill_lb_pcie(struct lb_pcie *pcie);
/* Define this in mainboard.c to add board-specific table entries. */
void lb_board(struct lb_header *header);
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index 6c09cb13c4..0f20735204 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -33,7 +33,7 @@
void lb_string_platform_blob_version(struct lb_header *header);
#endif
-__weak enum cb_err lb_fill_pcie(struct lb_pcie *pcie)
+__weak enum cb_err fill_lb_pcie(struct lb_pcie *pcie)
{
return CB_ERR_NOT_IMPLEMENTED;
}
@@ -129,7 +129,7 @@ static void lb_pcie(struct lb_header *header)
{
struct lb_pcie pcie = { .tag = LB_TAG_PCIE, .size = sizeof(pcie) };
- if (lb_fill_pcie(&pcie) != CB_SUCCESS)
+ if (fill_lb_pcie(&pcie) != CB_SUCCESS)
return;
memcpy(lb_new_record(header), &pcie, sizeof(pcie));
diff --git a/src/soc/mediatek/common/pcie.c b/src/soc/mediatek/common/pcie.c
index febb76dc77..fd93665f8a 100644
--- a/src/soc/mediatek/common/pcie.c
+++ b/src/soc/mediatek/common/pcie.c
@@ -211,7 +211,7 @@ void mtk_pcie_domain_set_resources(struct device *dev)
pci_domain_set_resources(dev);
}
-enum cb_err lb_fill_pcie(struct lb_pcie *pcie)
+enum cb_err fill_lb_pcie(struct lb_pcie *pcie)
{
if (!pci_root_bus())
return CB_ERR;
diff --git a/src/soc/qualcomm/common/pcie_common.c b/src/soc/qualcomm/common/pcie_common.c
index e27b0fcbfb..2f53e28028 100644
--- a/src/soc/qualcomm/common/pcie_common.c
+++ b/src/soc/qualcomm/common/pcie_common.c
@@ -414,7 +414,7 @@ static enum cb_err qcom_dw_pcie_enable(struct qcom_pcie_cntlr_t *pcie)
* Fill coreboot table with PCIe info.
* It allows exporting this info to payloads.
*/
-enum cb_err lb_fill_pcie(struct lb_pcie *pcie)
+enum cb_err fill_lb_pcie(struct lb_pcie *pcie)
{
pcie_cntlr_cfg_t *pcierc = qcom_pcie_cfg.cntlr_cfg;
pcie->ctrl_base = (uintptr_t)pcierc->dbi_base;