4 files changed, 14 insertions, 1 deletions
diff --git a/src/soc/intel/meteorlake/include/soc/iomap.h b/src/soc/intel/meteorlake/include/soc/iomap.h
index a2df40ccb4..3efe400fa9 100644
--- a/src/soc/intel/meteorlake/include/soc/iomap.h
+++ b/src/soc/intel/meteorlake/include/soc/iomap.h
@@ -25,6 +25,9 @@
 
 #define HPET_BASE_ADDRESS	0xfed00000
 
+#define IOE_PWRM_BASE_ADDRESS	0xfe400000
+#define IOE_PWRM_BASE_SIZE	0x10000
+
 #define PCH_PWRM_BASE_ADDRESS	0xfe000000
 #define PCH_PWRM_BASE_SIZE	0x10000
 
diff --git a/src/soc/intel/meteorlake/include/soc/pm.h b/src/soc/intel/meteorlake/include/soc/pm.h
index c486232e7d..7474cdd8bc 100644
--- a/src/soc/intel/meteorlake/include/soc/pm.h
+++ b/src/soc/intel/meteorlake/include/soc/pm.h
@@ -150,6 +150,9 @@ struct chipset_power_state {
 /* Get base address PMC memory mapped registers. */
 uint8_t *pmc_mmio_regs(void);
 
+/* Get base address IOE.PMC memory mapped registers. */
+uint8_t *ioe_pmc_mmio_regs(void);
+
 /* Get base address of TCO I/O registers. */
 uint16_t smbus_tco_regs(void);
 
diff --git a/src/soc/intel/meteorlake/pmc.c b/src/soc/intel/meteorlake/pmc.c
index bdd7a3b88a..9a2c9826c7 100644
--- a/src/soc/intel/meteorlake/pmc.c
+++ b/src/soc/intel/meteorlake/pmc.c
@@ -157,8 +157,10 @@ static void soc_pmc_init(struct device *dev)
 	 * Disabling ACPI PM timer is necessary for XTAL OSC shutdown.
 	 * Disabling ACPI PM timer also switches off TCO
 	 */
-	if (!CONFIG(USE_PM_ACPI_TIMER))
+	if (!CONFIG(USE_PM_ACPI_TIMER)) {
 		setbits8(pmc_mmio_regs() + PCH_PWRM_ACPI_TMR_CTL, ACPI_TIM_DIS);
+		setbits8(ioe_pmc_mmio_regs() + PCH_PWRM_ACPI_TMR_CTL, ACPI_TIM_DIS);
+	}
 }
 
 static void pm1_enable_pwrbtn_smi(void *unused)
diff --git a/src/soc/intel/meteorlake/pmutil.c b/src/soc/intel/meteorlake/pmutil.c
index 8b377c0b9e..abe95509cd 100644
--- a/src/soc/intel/meteorlake/pmutil.c
+++ b/src/soc/intel/meteorlake/pmutil.c
@@ -134,6 +134,11 @@ uint8_t *pmc_mmio_regs(void)
 	return (void *)(uintptr_t)PCH_PWRM_BASE_ADDRESS;
 }
 
+uint8_t *ioe_pmc_mmio_regs(void)
+{
+	return (void *)(uintptr_t)IOE_PWRM_BASE_ADDRESS;
+}
+
 uintptr_t soc_read_pmc_base(void)
 {
 	return (uintptr_t)pmc_mmio_regs();