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-rw-r--r--src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb3
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb3
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb3
-rw-r--r--src/soc/intel/elkhartlake/chip.h4
-rw-r--r--src/soc/intel/elkhartlake/smihandler.c6
5 files changed, 1 insertions, 18 deletions
diff --git a/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb b/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb
index 18005418ef..0fdc88a7a8 100644
--- a/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb
+++ b/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb
@@ -12,9 +12,6 @@ chip soc/intel/elkhartlake
register "pmc_gpe0_dw1" = "GPP_F"
register "pmc_gpe0_dw2" = "GPP_E"
- # Enable heci1 communication
- register "HeciEnabled" = "1"
-
# FSP configuration
register "SaGv" = "SaGv_Enabled"
register "SmbusEnable" = "1"
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb
index 228bf60128..87b455fd83 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb
@@ -12,9 +12,6 @@ chip soc/intel/elkhartlake
register "pmc_gpe0_dw1" = "GPP_F"
register "pmc_gpe0_dw2" = "GPP_E"
- # Enable heci1 communication
- register "HeciEnabled" = "1"
-
# FSP configuration
register "SaGv" = "SaGv_Disabled"
register "SmbusEnable" = "1"
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
index ca905576b0..acb928665e 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
@@ -12,9 +12,6 @@ chip soc/intel/elkhartlake
register "pmc_gpe0_dw1" = "GPP_F"
register "pmc_gpe0_dw2" = "GPP_E"
- # Enable heci1 communication
- register "HeciEnabled" = "1"
-
# FSP configuration
register "SaGv" = "SaGv_Disabled"
register "SmbusEnable" = "1"
diff --git a/src/soc/intel/elkhartlake/chip.h b/src/soc/intel/elkhartlake/chip.h
index e18e52db94..210e92c4b6 100644
--- a/src/soc/intel/elkhartlake/chip.h
+++ b/src/soc/intel/elkhartlake/chip.h
@@ -226,10 +226,6 @@ struct soc_intel_elkhartlake_config {
uint8_t Device4Enable;
- /* HeciEnabled decides the state of Heci1 at end of boot
- * Setting to 0 (default) disables Heci1 and hides the device from OS */
- uint8_t HeciEnabled;
-
/* Enable/Disable EIST. 1b:Enabled, 0b:Disabled */
uint8_t eist_enable;
diff --git a/src/soc/intel/elkhartlake/smihandler.c b/src/soc/intel/elkhartlake/smihandler.c
index 6637847e17..e3c5012a5f 100644
--- a/src/soc/intel/elkhartlake/smihandler.c
+++ b/src/soc/intel/elkhartlake/smihandler.c
@@ -16,11 +16,7 @@
*/
void smihandler_soc_at_finalize(void)
{
- const struct soc_intel_elkhartlake_config *config;
-
- config = config_of_soc();
-
- if (!config->HeciEnabled && CONFIG(HECI_DISABLE_USING_SMM))
+ if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT))
heci_disable();
}