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-rw-r--r--src/cpu/amd/pi/romstage.c12
-rw-r--r--src/northbridge/amd/pi/Kconfig2
2 files changed, 12 insertions, 2 deletions
diff --git a/src/cpu/amd/pi/romstage.c b/src/cpu/amd/pi/romstage.c
index 393cbd4aeb..9a5fbac003 100644
--- a/src/cpu/amd/pi/romstage.c
+++ b/src/cpu/amd/pi/romstage.c
@@ -14,10 +14,12 @@
*/
#include <arch/cpu.h>
+#include <cbmem.h>
#include <cpu/amd/car.h>
#include <cpu/x86/mtrr.h>
#include <console/console.h>
#include <program_loading.h>
+#include <romstage_handoff.h>
#include <northbridge/amd/agesa/agesa_helper.h>
#include <northbridge/amd/agesa/state_machine.h>
@@ -28,12 +30,20 @@ void asmlinkage early_all_cores(void)
void * asmlinkage romstage_main(unsigned long bist)
{
- uintptr_t stack_top = CACHE_TMP_RAMTOP;
+ int s3resume = 0;
u8 initial_apic_id = cpuid_ebx(1) >> 24;
/* Only BSP returns from here. */
cache_as_ram_main(bist, initial_apic_id);
+ cbmem_recovery(s3resume);
+
+ romstage_handoff_init(s3resume);
+
+ uintptr_t stack_top = romstage_ram_stack_base(HIGH_ROMSTAGE_STACK_SIZE,
+ ROMSTAGE_STACK_CBMEM);
+ stack_top += HIGH_ROMSTAGE_STACK_SIZE;
+
printk(BIOS_DEBUG, "Move CAR stack.\n");
return (void*)stack_top;
}
diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig
index 6f4c4b73be..7da2ae9e64 100644
--- a/src/northbridge/amd/pi/Kconfig
+++ b/src/northbridge/amd/pi/Kconfig
@@ -17,7 +17,7 @@ config NORTHBRIDGE_AMD_PI
bool
default y if CPU_AMD_PI
default n
- select LATE_CBMEM_INIT
+ select CBMEM_TOP_BACKUP
if NORTHBRIDGE_AMD_PI