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-rw-r--r--src/mainboard/google/brya/variants/felwinter/overridetree.cb8
-rw-r--r--src/mainboard/google/brya/variants/mithrax/overridetree.cb12
2 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/google/brya/variants/felwinter/overridetree.cb b/src/mainboard/google/brya/variants/felwinter/overridetree.cb
index 40cbe4e46e..61cb50022a 100644
--- a/src/mainboard/google/brya/variants/felwinter/overridetree.cb
+++ b/src/mainboard/google/brya/variants/felwinter/overridetree.cb
@@ -377,7 +377,7 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
register "usb_lpm_incapable" = "true"
device ref tcss_usb3_port2 on end
end
@@ -385,7 +385,7 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
device ref tcss_usb3_port3 on end
end
end
@@ -398,14 +398,14 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref usb2_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
diff --git a/src/mainboard/google/brya/variants/mithrax/overridetree.cb b/src/mainboard/google/brya/variants/mithrax/overridetree.cb
index 6075351b25..61344d7e63 100644
--- a/src/mainboard/google/brya/variants/mithrax/overridetree.cb
+++ b/src/mainboard/google/brya/variants/mithrax/overridetree.cb
@@ -325,7 +325,7 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(1, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
register "usb_lpm_incapable" = "true"
device ref tcss_usb3_port2 on end
end
@@ -333,7 +333,7 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
device ref tcss_usb3_port3 on end
end
end
@@ -346,14 +346,14 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(1, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref usb2_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
@@ -365,7 +365,7 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-A Port A0 (DB)""
register "type" = "UPC_TYPE_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(1, 2))"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@@ -379,7 +379,7 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-A Port A0 (DB)""
register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(1, 2))"
device ref usb3_port1 on end
end
end