diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/qualcomm/sc7280/Makefile.inc | 27 | ||||
| -rw-r--r-- | src/soc/qualcomm/sc7280/bootblock.c | 2 | ||||
| -rw-r--r-- | src/soc/qualcomm/sc7280/include/soc/addressmap.h | 27 | ||||
| -rw-r--r-- | src/soc/qualcomm/sc7280/include/soc/qcom_qup_se.h | 43 | ||||
| -rw-r--r-- | src/soc/qualcomm/sc7280/qcom_qup_se.c | 86 |
5 files changed, 185 insertions, 0 deletions
diff --git a/src/soc/qualcomm/sc7280/Makefile.inc b/src/soc/qualcomm/sc7280/Makefile.inc index 9c85968221..13d92fda28 100644 --- a/src/soc/qualcomm/sc7280/Makefile.inc +++ b/src/soc/qualcomm/sc7280/Makefile.inc @@ -6,6 +6,9 @@ all-y += ../common/clock.c all-y += clock.c all-y += ../common/spi.c all-$(CONFIG_SC7280_QSPI) += ../common/qspi.c +all-y += ../common/qupv3_config.c +all-y += qcom_qup_se.c +all-y += ../common/qup_se_handler.c ################################################################################ bootblock-y += bootblock.c @@ -63,4 +66,28 @@ $(DCB_CBFS)-type := raw $(DCB_CBFS)-compression := $(CBFS_COMPRESS_FLAG) cbfs-files-y += $(DCB_CBFS) +################################################################################ +UART_FW_FILE := $(SC7280_BLOB)/qup_fw/uart_fw.bin +UART_FW_CBFS := $(CONFIG_CBFS_PREFIX)/uart_fw +$(UART_FW_CBFS)-file := $(UART_FW_FILE) +$(UART_FW_CBFS)-type := raw +$(UART_FW_CBFS)-compression := none +cbfs-files-y += $(UART_FW_CBFS) + +################################################################################ +SPI_FW_FILE := $(SC7280_BLOB)/qup_fw/spi_fw.bin +SPI_FW_CBFS := $(CONFIG_CBFS_PREFIX)/spi_fw +$(SPI_FW_CBFS)-file := $(SPI_FW_FILE) +$(SPI_FW_CBFS)-type := raw +$(SPI_FW_CBFS)-compression := none +cbfs-files-y += $(SPI_FW_CBFS) + +################################################################################ +I2C_FW_FILE := $(SC7280_BLOB)/qup_fw/i2c_fw.bin +I2C_FW_CBFS := $(CONFIG_CBFS_PREFIX)/i2c_fw +$(I2C_FW_CBFS)-file := $(I2C_FW_FILE) +$(I2C_FW_CBFS)-type := raw +$(I2C_FW_CBFS)-compression := none +cbfs-files-y += $(I2C_FW_CBFS) + endif diff --git a/src/soc/qualcomm/sc7280/bootblock.c b/src/soc/qualcomm/sc7280/bootblock.c index ce86151145..365b7d4460 100644 --- a/src/soc/qualcomm/sc7280/bootblock.c +++ b/src/soc/qualcomm/sc7280/bootblock.c @@ -3,9 +3,11 @@ #include <bootblock_common.h> #include <soc/clock.h> #include <soc/qspi_common.h> +#include <soc/qupv3_config_common.h> void bootblock_soc_init(void) { clock_init(); quadspi_init(37500 * KHz); + qupv3_fw_init(); } diff --git a/src/soc/qualcomm/sc7280/include/soc/addressmap.h b/src/soc/qualcomm/sc7280/include/soc/addressmap.h index 14c83fe7da..599d03f7b6 100644 --- a/src/soc/qualcomm/sc7280/include/soc/addressmap.h +++ b/src/soc/qualcomm/sc7280/include/soc/addressmap.h @@ -28,4 +28,31 @@ #define SDC1_TLMM_CFG_ADDR 0x0F1B3000 #define SDC2_TLMM_CFG_ADDR 0x0F1B4000 +/* + * QUP SERIAL ENGINE BASE ADDRESSES + */ +/* QUPV3_0 */ +#define QUP_SERIAL0_BASE 0x00980000 +#define QUP_SERIAL1_BASE 0x00984000 +#define QUP_SERIAL2_BASE 0x00988000 +#define QUP_SERIAL3_BASE 0x0098C000 +#define QUP_SERIAL4_BASE 0x00990000 +#define QUP_SERIAL5_BASE 0x00994000 +#define QUP_SERIAL6_BASE 0x00998000 +#define QUP_SERIAL7_BASE 0x0099C000 +#define QUP_WRAP0_BASE 0x009C0000 +#define QUP_0_GSI_BASE 0x00904000 + +/* QUPV3_1 */ +#define QUP_SERIAL8_BASE 0x00A80000 +#define QUP_SERIAL9_BASE 0x00A84000 +#define QUP_SERIAL10_BASE 0x00A88000 +#define QUP_SERIAL11_BASE 0x00A8C000 +#define QUP_SERIAL12_BASE 0x00A90000 +#define QUP_SERIAL13_BASE 0x00A94000 +#define QUP_SERIAL14_BASE 0x00A98000 +#define QUP_SERIAL15_BASE 0x00A9C000 +#define QUP_WRAP1_BASE 0x00AC0000 +#define QUP_1_GSI_BASE 0x00A04000 + #endif /* __SOC_QUALCOMM_SC7280_ADDRESS_MAP_H__ */ diff --git a/src/soc/qualcomm/sc7280/include/soc/qcom_qup_se.h b/src/soc/qualcomm/sc7280/include/soc/qcom_qup_se.h new file mode 100644 index 0000000000..08cc2e5c01 --- /dev/null +++ b/src/soc/qualcomm/sc7280/include/soc/qcom_qup_se.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __SOC_QCOM_QUP_SE_H__ +#define __SOC_QCOM_QUP_SE_H__ + +#include <console/console.h> +#include <device/mmio.h> +#include <gpio.h> +#include <soc/addressmap.h> +#include <timer.h> +#include <types.h> + +enum qup_se { + QUPV3_0_SE0, + QUPV3_0_SE1, + QUPV3_0_SE2, + QUPV3_0_SE3, + QUPV3_0_SE4, + QUPV3_0_SE5, + QUPV3_0_SE6, + QUPV3_0_SE7, + QUPV3_1_SE0, + QUPV3_1_SE1, + QUPV3_1_SE2, + QUPV3_1_SE3, + QUPV3_1_SE4, + QUPV3_1_SE5, + QUPV3_1_SE6, + QUPV3_1_SE7, + QUPV3_SE_MAX, +}; + +struct qup { + struct qup_regs *regs; + gpio_t pin[4]; + u8 func[4]; +}; + +extern struct qup qup[QUPV3_SE_MAX]; + +#define MAX_OFFSET_CFG_REG 0x000001c4 + +#endif /* __SOC_QCOM_QUP_SE_H__ */ diff --git a/src/soc/qualcomm/sc7280/qcom_qup_se.c b/src/soc/qualcomm/sc7280/qcom_qup_se.c new file mode 100644 index 0000000000..2ed4c854f6 --- /dev/null +++ b/src/soc/qualcomm/sc7280/qcom_qup_se.c @@ -0,0 +1,86 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/qcom_qup_se.h> + +struct qup qup[QUPV3_SE_MAX] = { + [QUPV3_0_SE0] = { .regs = (void *)QUP_SERIAL0_BASE, + .pin = { GPIO(0), GPIO(1), GPIO(2), GPIO(3) }, + .func = { GPIO0_FUNC_QUP0_L0, GPIO1_FUNC_QUP0_L1, + GPIO2_FUNC_QUP0_L2, GPIO3_FUNC_QUP0_L3 } + }, + [QUPV3_0_SE1] = { .regs = (void *)QUP_SERIAL1_BASE, + .pin = { GPIO(4), GPIO(5), GPIO(6), GPIO(7) }, + .func = { GPIO4_FUNC_QUP0_L0, GPIO5_FUNC_QUP0_L1, + GPIO6_FUNC_QUP0_L2, GPIO7_FUNC_QUP0_L3 } + }, + [QUPV3_0_SE2] = { .regs = (void *)QUP_SERIAL2_BASE, + .pin = { GPIO(8), GPIO(9), GPIO(10), GPIO(11) }, + .func = { GPIO8_FUNC_QUP0_L0, GPIO9_FUNC_QUP0_L1, + GPIO10_FUNC_QUP0_L2, GPIO11_FUNC_QUP0_L3 } + }, + [QUPV3_0_SE3] = { .regs = (void *)QUP_SERIAL3_BASE, + .pin = { GPIO(12), GPIO(13), GPIO(14), GPIO(15) }, + .func = { GPIO12_FUNC_QUP0_L0, GPIO13_FUNC_QUP0_L1, + GPIO14_FUNC_QUP0_L2, GPIO15_FUNC_QUP0_L3 } + }, + [QUPV3_0_SE4] = { .regs = (void *)QUP_SERIAL4_BASE, + .pin = { GPIO(16), GPIO(17), GPIO(18), GPIO(19) }, + .func = { GPIO16_FUNC_QUP0_L0, GPIO17_FUNC_QUP0_L1, + GPIO18_FUNC_QUP0_L2, GPIO19_FUNC_QUP0_L3 } + }, + [QUPV3_0_SE5] = { .regs = (void *)QUP_SERIAL5_BASE, + .pin = { GPIO(20), GPIO(21), GPIO(22), GPIO(23) }, + .func = { GPIO20_FUNC_QUP0_L0, GPIO21_FUNC_QUP0_L1, + GPIO22_FUNC_QUP0_L2, GPIO23_FUNC_QUP0_L3 } + }, + [QUPV3_0_SE6] = { .regs = (void *)QUP_SERIAL6_BASE, + .pin = { GPIO(24), GPIO(25), GPIO(26), GPIO(27) }, + .func = { GPIO24_FUNC_QUP0_L0, GPIO25_FUNC_QUP0_L1, + GPIO26_FUNC_QUP0_L2, GPIO27_FUNC_QUP0_L3 } + }, + [QUPV3_0_SE7] = { .regs = (void *)QUP_SERIAL7_BASE, + .pin = { GPIO(28), GPIO(29), GPIO(30), GPIO(31) }, + .func = { GPIO28_FUNC_QUP0_L0, GPIO29_FUNC_QUP0_L1, + GPIO30_FUNC_QUP0_L2, GPIO31_FUNC_QUP0_L3 } + }, + [QUPV3_1_SE0] = { .regs = (void *)QUP_SERIAL8_BASE, + .pin = { GPIO(32), GPIO(33), GPIO(34), GPIO(35) }, + .func = { GPIO32_FUNC_QUP1_L0, GPIO33_FUNC_QUP1_L1, + GPIO34_FUNC_QUP1_L2, GPIO35_FUNC_QUP1_L3 } + }, + [QUPV3_1_SE1] = { .regs = (void *)QUP_SERIAL9_BASE, + .pin = { GPIO(36), GPIO(37), GPIO(38), GPIO(39) }, + .func = { GPIO36_FUNC_QUP1_L0, GPIO37_FUNC_QUP1_L1, + GPIO38_FUNC_QUP1_L2, GPIO39_FUNC_QUP1_L3 } + }, + [QUPV3_1_SE2] = { .regs = (void *)QUP_SERIAL10_BASE, + .pin = { GPIO(40), GPIO(41), GPIO(42), GPIO(43) }, + .func = { GPIO40_FUNC_QUP1_L0, GPIO41_FUNC_QUP1_L1, + GPIO42_FUNC_QUP1_L2, GPIO43_FUNC_QUP1_L3 } + }, + [QUPV3_1_SE3] = { .regs = (void *)QUP_SERIAL11_BASE, + .pin = { GPIO(44), GPIO(45), GPIO(46), GPIO(47) }, + .func = { GPIO44_FUNC_QUP1_L0, GPIO45_FUNC_QUP1_L1, + GPIO46_FUNC_QUP1_L2, GPIO47_FUNC_QUP1_L3 } + }, + [QUPV3_1_SE4] = { .regs = (void *)QUP_SERIAL12_BASE, + .pin = { GPIO(48), GPIO(49), GPIO(50), GPIO(51) }, + .func = { GPIO48_FUNC_QUP1_L0, GPIO49_FUNC_QUP1_L1, + GPIO50_FUNC_QUP1_L2, GPIO51_FUNC_QUP1_L3 } + }, + [QUPV3_1_SE5] = { .regs = (void *)QUP_SERIAL13_BASE, + .pin = { GPIO(52), GPIO(53), GPIO(54), GPIO(55) }, + .func = { GPIO52_FUNC_QUP1_L0, GPIO53_FUNC_QUP1_L1, + GPIO54_FUNC_QUP1_L2, GPIO55_FUNC_QUP1_L3 } + }, + [QUPV3_1_SE6] = { .regs = (void *)QUP_SERIAL14_BASE, + .pin = { GPIO(56), GPIO(57), GPIO(58), GPIO(59) }, + .func = { GPIO56_FUNC_QUP1_L0, GPIO57_FUNC_QUP1_L1, + GPIO58_FUNC_QUP1_L2, GPIO59_FUNC_QUP1_L3 } + }, + [QUPV3_1_SE7] = { .regs = (void *)QUP_SERIAL15_BASE, + .pin = { GPIO(60), GPIO(61), GPIO(62), GPIO(63) }, + .func = { GPIO60_FUNC_QUP1_L0, GPIO61_FUNC_QUP1_L1, + GPIO62_FUNC_QUP1_L2, GPIO63_FUNC_QUP1_L3 } + }, +}; |