aboutsummaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/broadwell/Kconfig17
1 files changed, 1 insertions, 16 deletions
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig
index 61513e8b70..5b73f4f941 100644
--- a/src/soc/intel/broadwell/Kconfig
+++ b/src/soc/intel/broadwell/Kconfig
@@ -19,24 +19,9 @@ config BROADWELL_LPDDR3
Selected by mainboards using LPDDR3 DRAM to supply mainboard-specific
LPDDR3 DQ and DQS CPU-to-DRAM mapping info needed to perform raminit.
-config BROADWELL_VBOOT_IN_BOOTBLOCK
- depends on VBOOT
- bool "Start verstage in bootblock"
- default y
- select VBOOT_STARTS_IN_BOOTBLOCK
- help
- Broadwell can either start verstage in a separate stage
- right after the bootblock has run or it can start it
- after romstage for compatibility reasons.
- Broadwell however uses a mrc.bin to initialize memory which
- needs to be located at a fixed offset. Therefore even with
- a separate verstage starting after the bootblock that same
- binary is used meaning a jump is made from RW to the RO region
- and back to the RW region after the binary is done.
-
config VBOOT
select VBOOT_MUST_REQUEST_DISPLAY
- select VBOOT_STARTS_IN_ROMSTAGE if !BROADWELL_VBOOT_IN_BOOTBLOCK
+ select VBOOT_STARTS_IN_BOOTBLOCK
config ECAM_MMCONF_BASE_ADDRESS
default 0xf0000000