diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/lenovo/t430/vboot-ro.fmd | 21 | ||||
| -rw-r--r-- | src/mainboard/lenovo/t430s/vboot-ro.fmd | 21 | ||||
| -rw-r--r-- | src/mainboard/lenovo/t440p/vboot-ro.fmd | 21 | ||||
| -rw-r--r-- | src/mainboard/lenovo/t530/vboot-ro.fmd | 21 | ||||
| -rw-r--r-- | src/mainboard/lenovo/x131e/vboot-ro.fmd | 21 | ||||
| -rw-r--r-- | src/mainboard/lenovo/x1_carbon_gen1/vboot-ro.fmd | 21 | ||||
| -rw-r--r-- | src/mainboard/lenovo/x230/vboot-ro.fmd | 21 |
7 files changed, 147 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t430/vboot-ro.fmd b/src/mainboard/lenovo/t430/vboot-ro.fmd new file mode 100644 index 0000000000..6bdd4cc458 --- /dev/null +++ b/src/mainboard/lenovo/t430/vboot-ro.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x500000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0x700000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/t430s/vboot-ro.fmd b/src/mainboard/lenovo/t430s/vboot-ro.fmd new file mode 100644 index 0000000000..6bdd4cc458 --- /dev/null +++ b/src/mainboard/lenovo/t430s/vboot-ro.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x500000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0x700000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/t440p/vboot-ro.fmd b/src/mainboard/lenovo/t440p/vboot-ro.fmd new file mode 100644 index 0000000000..6bdd4cc458 --- /dev/null +++ b/src/mainboard/lenovo/t440p/vboot-ro.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x500000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0x700000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/t530/vboot-ro.fmd b/src/mainboard/lenovo/t530/vboot-ro.fmd new file mode 100644 index 0000000000..6bdd4cc458 --- /dev/null +++ b/src/mainboard/lenovo/t530/vboot-ro.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x500000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0x700000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/x131e/vboot-ro.fmd b/src/mainboard/lenovo/x131e/vboot-ro.fmd new file mode 100644 index 0000000000..6bdd4cc458 --- /dev/null +++ b/src/mainboard/lenovo/x131e/vboot-ro.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x500000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0x700000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/x1_carbon_gen1/vboot-ro.fmd b/src/mainboard/lenovo/x1_carbon_gen1/vboot-ro.fmd new file mode 100644 index 0000000000..6bdd4cc458 --- /dev/null +++ b/src/mainboard/lenovo/x1_carbon_gen1/vboot-ro.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x500000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0x700000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/x230/vboot-ro.fmd b/src/mainboard/lenovo/x230/vboot-ro.fmd new file mode 100644 index 0000000000..6bdd4cc458 --- /dev/null +++ b/src/mainboard/lenovo/x230/vboot-ro.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x500000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0x700000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} |