diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/armv7/Kconfig | 4 | ||||
| -rw-r--r-- | src/arch/armv7/lib/eabi_compat.c | 5 | ||||
| -rw-r--r-- | src/cpu/samsung/exynos5-common/spl.h | 94 | ||||
| -rw-r--r-- | src/cpu/samsung/exynos5-common/spl_boot.c | 447 | ||||
| -rw-r--r-- | src/cpu/samsung/exynos5250/Kconfig | 4 | ||||
| -rw-r--r-- | src/cpu/samsung/exynos5250/clk.h | 3 | ||||
| -rw-r--r-- | src/cpu/samsung/exynos5250/clock_init.c | 2 | ||||
| -rw-r--r-- | src/cpu/samsung/exynos5250/dmc_common.c | 2 | ||||
| -rw-r--r-- | src/cpu/samsung/exynos5250/power.c | 4 | ||||
| -rw-r--r-- | src/cpu/samsung/s5p-common/cpu_info.c | 2 | ||||
| -rw-r--r-- | src/cpu/samsung/s5p-common/s5p_gpio.c | 2 | ||||
| -rw-r--r-- | src/cpu/samsung/s5p-common/timer.c | 3 | ||||
| -rw-r--r-- | src/mainboard/google/snow/Makefile.inc | 8 | ||||
| -rw-r--r-- | src/mainboard/google/snow/romstage.c | 13 | ||||
| -rw-r--r-- | src/mainboard/google/snow/smdk5250_spl.c | 89 |
15 files changed, 20 insertions, 662 deletions
diff --git a/src/arch/armv7/Kconfig b/src/arch/armv7/Kconfig index 65de2d5d1e..488ca97e4c 100644 --- a/src/arch/armv7/Kconfig +++ b/src/arch/armv7/Kconfig @@ -1,9 +1,5 @@ menu "Architecture (armv7)" -config SPL_BUILD - bool "Build second-phase bootloader (SPL)" - default y - config EABI_COMPAT bool "Toolchain is EABI compatible" default n diff --git a/src/arch/armv7/lib/eabi_compat.c b/src/arch/armv7/lib/eabi_compat.c index 5f59892432..2772de6d04 100644 --- a/src/arch/armv7/lib/eabi_compat.c +++ b/src/arch/armv7/lib/eabi_compat.c @@ -10,14 +10,13 @@ */ #include <common.h> +#include <console/console.h> /* FIXME(dhendrix): prototypes added for assembler */ int raise (int signum); int raise (int signum) { -#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) - printf("raise: Signal # %d caught\n", signum); -#endif + printk(BIOS_CRIT, "raise: Signal # %d caught\n", signum); return 0; } diff --git a/src/cpu/samsung/exynos5-common/spl.h b/src/cpu/samsung/exynos5-common/spl.h deleted file mode 100644 index afa9a8e909..0000000000 --- a/src/cpu/samsung/exynos5-common/spl.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Copyright (c) 2012 The Chromium OS Authors. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_EXYNOS_SPL_H__ -#define __ASM_ARCH_EXYNOS_SPL_H__ - -#include <cpu/samsung/exynos5-common/cpu.h> -/* FIXME(dhendrix): non-common header included by a common header... */ -#include <cpu/samsung/exynos5250/dmc.h> - -/* Parameters of early board initialization in SPL */ -struct spl_machine_param { - /* Add fields as and when required */ - u32 signature; - u32 version; /* Version number */ - u32 size; /* Size of block */ - /** - * Parameters we expect, in order, terminated with \0. Each parameter - * is a single character representing one 32-bit word in this - * structure. - * - * Valid characters in this string are: - * - * Code Name - * v mem_iv_size - * m mem_type - * u uboot_size - * b boot_source - * f frequency_mhz (memory frequency in MHz) - * a ARM clock frequency in MHz - * s serial base address - * i i2c base address for early access (meant for PMIC) - * r board rev GPIO numbers used to read board revision - * (lower halfword=bit 0, upper=bit 1) - * M Memory Manufacturer name - * w Bad Wake GPIO number - * \0 termination - */ - char params[12]; /* Length must be word-aligned */ - u32 mem_iv_size; /* Memory channel interleaving size */ - enum ddr_mode mem_type; /* Type of on-board memory */ - /* - * U-boot size - The iROM mmc copy function used by the SPL takes a - * block count paramter to describe the u-boot size unlike the spi - * boot copy function which just uses the u-boot size directly. Align - * the u-boot size to block size (512 bytes) when populating the SPL - * table only for mmc boot. - */ - u32 uboot_size; - enum boot_mode boot_source; /* Boot device */ - unsigned frequency_mhz; /* Frequency of memory in MHz */ - unsigned arm_freq_mhz; /* ARM Frequency in MHz */ - u32 serial_base; /* Serial base address */ - u32 i2c_base; /* i2c base address */ - u32 board_rev_gpios; /* Board revision GPIOs */ - enum mem_manuf mem_manuf; /* Memory Manufacturer */ - u32 bad_wake_gpio; /* If high at wake time disallow wake */ -} __attribute__((__packed__)); - -/** - * Validate signature and return a pointer to the parameter table. If the - * signature is invalid, call panic() and never return. - * - * @return pointer to the parameter table if signature matched or never return. - */ -struct spl_machine_param *spl_get_machine_params(void); - -/* - * Initialize the timer and serial driver in SPL u-boot. - * Besides the serial driver, it also setup the minimal set of its dependency, - * like gd struct, pinmux, and serial. - */ -void spl_early_init(void); - -#endif /* __ASM_ARCH_EXYNOS_SPL_H__ */ diff --git a/src/cpu/samsung/exynos5-common/spl_boot.c b/src/cpu/samsung/exynos5-common/spl_boot.c deleted file mode 100644 index ddf69372ef..0000000000 --- a/src/cpu/samsung/exynos5-common/spl_boot.c +++ /dev/null @@ -1,447 +0,0 @@ -/* - * Copyright (C) 2011 Samsung Electronics - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* FIXME(dhendrix): pulled in a lot of extra crap such as partition and string - libs*/ -#include <assert.h> -#include <common.h> -#include <stdlib.h> -#include <string.h> - -#include <console/console.h> -#include <console/loglevel.h> -//#include <asm/arch/board.h> - -#include <config.h> -#include <spi.h> -#if 0 -#include <asm/arch/clock.h> -#include <asm/arch-exynos/spi.h> -#include <asm/arch/pinmux.h> -#include <asm/arch/power.h> -#endif -#include <arch/hlt.h> -#include <cpu/samsung/exynos5250/clk.h> -#include <cpu/samsung/exynos5250/cpu.h> -#include <cpu/samsung/exynos5250/periph.h> -#include <cpu/samsung/exynos5250/pinmux.h> -#include <cpu/samsung/exynos5250/power.h> -#include <cpu/samsung/exynos5250/spi.h> - -#include <cpu/samsung/exynos5-common/cpu.h> -#include <cpu/samsung/exynos5-common/exynos5-common.h> - -//#include <asm/system.h> -#include <system.h> - -#include <arch/io.h> - -#define OM_STAT (0x1f << 1) - -/** - * Copy data from SD or MMC device to RAM. - * - * @param offset Block offset of the data - * @param nblock Number of blocks - * @param dst Destination address - * @return 1 = True or 0 = False - */ -typedef u32 (*mmc_copy_func_t)(u32 offset, u32 nblock, u32 dst); - -/** - * Copy data from SPI flash to RAM. - * - * @param offset Block offset of the data - * @param nblock Number of blocks - * @param dst Destination address - * @return 1 = True or 0 = False - */ -typedef u32 (*spi_copy_func_t)(u32 offset, u32 nblock, u32 dst); - - -/** - * Copy data through USB. - * - * @return 1 = True or 0 = False - */ -typedef u32 (*usb_copy_func_t)(void); - -/* - * Set/clear program flow prediction and return the previous state. - */ -static int config_branch_prediction(int set_cr_z) -{ - unsigned int cr; - - /* System Control Register: 11th bit Z Branch prediction enable */ - cr = get_cr(); - set_cr(set_cr_z ? cr | CR_Z : cr & ~CR_Z); - - return cr & CR_Z; -} - -#if 0 -static void spi_rx_tx(struct exynos_spi *regs, int todo, - void *dinp, void const *doutp, int i) -{ - uint *rxp = (uint *)(dinp + (i * (32 * 1024))); - int rx_lvl, tx_lvl; - uint out_bytes, in_bytes; - - out_bytes = in_bytes = todo; - setbits_le32(®s->ch_cfg, SPI_CH_RST); - clrbits_le32(®s->ch_cfg, SPI_CH_RST); - writel(((todo * 8) / 32) | SPI_PACKET_CNT_EN, ®s->pkt_cnt); - - while (in_bytes) { - uint32_t spi_sts; - int temp; - - spi_sts = readl(®s->spi_sts); - rx_lvl = ((spi_sts >> 15) & 0x7f); - tx_lvl = ((spi_sts >> 6) & 0x7f); - while (tx_lvl < 32 && out_bytes) { - temp = 0xffffffff; - writel(temp, ®s->tx_data); - out_bytes -= 4; - tx_lvl += 4; - } - while (rx_lvl >= 4 && in_bytes) { - temp = readl(®s->rx_data); - if (rxp) - *rxp++ = temp; - in_bytes -= 4; - rx_lvl -= 4; - } - } -} -#endif - -/* FIXME(dhendrix): feels like exynos_spi_copy should go somewhere else... */ -#if 0 -/** - * Copy uboot from spi flash to RAM - * - * @parma uboot_size size of u-boot to copy - */ -static void exynos_spi_copy(unsigned int uboot_size) -{ - int upto, todo; - int i; -// struct exynos_spi *regs = (struct exynos_spi *)samsung_get_base_spi1(); - struct exynos_spi *regs = (struct exynos_spi *)0x12d30000; - - clock_set_rate(PERIPH_ID_SPI1, 50000000); /* set spi clock to 50Mhz */ - /* set the spi1 GPIO */ - exynos_pinmux_config(PERIPH_ID_SPI1, PINMUX_FLAG_NONE); - - /* set pktcnt and enable it */ - writel(4 | SPI_PACKET_CNT_EN, ®s->pkt_cnt); - /* set FB_CLK_SEL */ - writel(SPI_FB_DELAY_180, ®s->fb_clk); - /* set CH_WIDTH and BUS_WIDTH as word */ - setbits_le32(®s->mode_cfg, SPI_MODE_CH_WIDTH_WORD | - SPI_MODE_BUS_WIDTH_WORD); - clrbits_le32(®s->ch_cfg, SPI_CH_CPOL_L); /* CPOL: active high */ - - /* clear rx and tx channel if set priveously */ - clrbits_le32(®s->ch_cfg, SPI_RX_CH_ON | SPI_TX_CH_ON); - - setbits_le32(®s->swap_cfg, SPI_RX_SWAP_EN | - SPI_RX_BYTE_SWAP | - SPI_RX_HWORD_SWAP); - - /* do a soft reset */ - setbits_le32(®s->ch_cfg, SPI_CH_RST); - clrbits_le32(®s->ch_cfg, SPI_CH_RST); - - /* now set rx and tx channel ON */ - setbits_le32(®s->ch_cfg, SPI_RX_CH_ON | SPI_TX_CH_ON | SPI_CH_HS_EN); - clrbits_le32(®s->cs_reg, SPI_SLAVE_SIG_INACT); /* CS low */ - - /* Send read instruction (0x3h) followed by a 24 bit addr */ - writel((SF_READ_DATA_CMD << 24) | SPI_FLASH_UBOOT_POS, ®s->tx_data); - - /* waiting for TX done */ - while (!(readl(®s->spi_sts) & SPI_ST_TX_DONE)); - - for (upto = 0, i = 0; upto < uboot_size; upto += todo, i++) { - todo = MIN(uboot_size - upto, (1 << 15)); - spi_rx_tx(regs, todo, (void *)(CONFIG_SYS_TEXT_BASE), - (void *)(SPI_FLASH_UBOOT_POS), i); - } - - setbits_le32(®s->cs_reg, SPI_SLAVE_SIG_INACT);/* make the CS high */ - - /* - * Let put controller mode to BYTE as - * SPI driver does not support WORD mode yet - */ - clrbits_le32(®s->mode_cfg, SPI_MODE_CH_WIDTH_WORD | - SPI_MODE_BUS_WIDTH_WORD); - writel(0, ®s->swap_cfg); - - /* - * Flush spi tx, rx fifos and reset the SPI controller - * and clear rx/tx channel - */ - clrsetbits_le32(®s->ch_cfg, SPI_CH_HS_EN, SPI_CH_RST); - clrbits_le32(®s->ch_cfg, SPI_CH_RST); - clrbits_le32(®s->ch_cfg, SPI_TX_CH_ON | SPI_RX_CH_ON); -} -#endif - -/* Copy U-Boot image to RAM */ -static void copy_uboot_to_ram(void) -{ - unsigned int sec_boot_check; - unsigned int uboot_size = CONFIG_COREBOOT_ROMSIZE_KB_4096; - int is_cr_z_set; - enum boot_mode boot_mode = BOOT_MODE_OM; - mmc_copy_func_t mmc_copy; - - usb_copy_func_t usb_copy; - -#if 0 - uboot_size = exynos_get_uboot_size(); - boot_mode = exynos_get_boot_device(); -#endif - - if (boot_mode == BOOT_MODE_OM) { - /* Read iRAM location to check for secondary USB boot mode */ - sec_boot_check = readl(EXYNOS_IRAM_SECONDARY_BASE); - if (sec_boot_check == EXYNOS_USB_SECONDARY_BOOT) - boot_mode = BOOT_MODE_USB; - } - debug("U-Boot size %u\n", uboot_size); - - if (boot_mode == BOOT_MODE_OM) - boot_mode = readl(EXYNOS_POWER_BASE) & OM_STAT; - - switch (boot_mode) { -#if defined(CONFIG_EXYNOS_SPI_BOOT) - case BOOT_MODE_SERIAL: - /* let us our own function to copy u-boot from SF */ - exynos_spi_copy(uboot_size); - break; -#endif - case BOOT_MODE_MMC: - mmc_copy = *(mmc_copy_func_t *)EXYNOS_COPY_MMC_FNPTR_ADDR; - assert(!(uboot_size & 511)); - mmc_copy(BL2_START_OFFSET, uboot_size / 512, - CONFIG_SYS_TEXT_BASE); - break; - case BOOT_MODE_USB: - /* - * iROM needs program flow prediction to be disabled - * before copy from USB device to RAM - */ - is_cr_z_set = config_branch_prediction(0); - usb_copy = *(usb_copy_func_t *) - EXYNOS_COPY_USB_FNPTR_ADDR; - usb_copy(); - config_branch_prediction(is_cr_z_set); - break; - default: - printk(BIOS_ERR, "Invalid boot mode selection\n"); - hlt(); - break; - } - debug("U-Boot copied\n"); -} - -#if 0 -/** - * Set up the U-Boot global_data pointer - * - * This sets the address of the global data, and sets up basic values. - * - * @param gdp Value to give to gd - */ -static void setup_global_data(gd_t *gdp) -{ - gd = gdp; - memzero((void *)gd, sizeof(gd_t)); - gd->flags |= GD_FLG_RELOC; - gd->baudrate = CONFIG_BAUDRATE; - gd->have_console = 1; -} -#endif - -#if 0 -/* Tell the loaded U-Boot that it was loaded from SPL */ -static void exynos5_set_spl_marker(void) -{ - uint32_t *marker = (uint32_t *)CONFIG_SPL_MARKER; - - *marker = EXYNOS5_SPL_MARKER; -} -#endif - -/* Board-specific call to see if wakeup is allowed. */ -static int __def_board_wakeup_permitted(void) -{ - return 1; -} -int board_wakeup_permitted(void) - __attribute__((weak, alias("__def_board_wakeup_permitted"))); - -void board_init_f(void) -{ - /* - * The gd struct is only needed for serial initialization. Since this - * function is called in SPL u-boot. We store the gd struct in the - * stack instead of the default memory region which may not be - * initialized. - */ -// __attribute__((aligned(8))) gd_t local_gd; -// __attribute__((noreturn)) void (*uboot)(void); - -// exynos5_set_spl_marker(); -// setup_global_data(&local_gd); - - /* - * Init subsystems, and resume if required. For a normal boot this - * will set up the UART and display a message. - */ - if (lowlevel_init_subsystems()) { - if (!board_wakeup_permitted()) - power_reset(); - power_exit_wakeup(); - } - -// printk(BIOS_INFO, "\n\nU-Boot SPL, board rev %u\n", board_get_revision()); - - copy_uboot_to_ram(); - /* Jump to U-Boot image */ -// uboot = (void *)CONFIG_SYS_TEXT_BASE; -// uboot(); - /* Never returns Here */ -// printk(BIOS_ERR, "%s: u-boot jump failed", __func__); - printk(BIOS_INFO, "%s: we should not be here...", __func__); - hlt(); -} - -//void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) {} - -#if 0 -/* - * The following functions are required when linking console library to SPL. - * - * Enabling UART in SPL u-boot requires console library. But some - * functions we needed in the console library depends on a bunch - * of library in libgeneric, like lib/ctype.o, lib/div64.o, lib/string.o, - * and lib/vsprintf.o. Adding them makes the SPL u-boot too large and not - * fit into the expected size. - * - * So we mock these functions in SPL, i.e. vsprintf(), panic(), etc., - * in order to cut its dependency. - */ -int vsprintf(char *buf, const char *fmt, va_list args) -{ - char *str = buf, *s; - ulong u; - - /* - * We won't implement all full functions of vsprintf(). - * We only implement %s and %u, and ignore others and directly use - * the original format string as its result. - */ - - while (*fmt) { - if (*fmt != '%') { - *str++ = *fmt++; - continue; - } - fmt++; - switch (*fmt) { - case '%': - *str++ = *fmt++; - break; - case 's': - fmt++; - s = va_arg(args, char *); - while (*s) - *str++ = *s++; - break; - case 'u': - fmt++; - u = va_arg(args, ulong); - s = simple_itoa(u); - while (*s) - *str++ = *s++; - break; - default: - /* Print the original string for unsupported formats */ - *str++ = '%'; - *str++ = *fmt++; - } - } - *str = '\0'; - return str - buf; -} -#endif - -#if 0 -void panic(const char *fmt, ...) -{ - va_list args; - va_start(args, fmt); - vprintf(fmt, args); - putc('\n'); - va_end(args); -#if defined(CONFIG_PANIC_HANG) - hang(); -#else - udelay(100000); /* allow messages to go out */ - do_reset(NULL, 0, 0, NULL); -#endif - while (1) - ; -} -#endif - -#if 0 -void __assert_fail(const char *assertion, const char *file, unsigned line, - const char *function) -{ - /* This will not return */ - panic("%s:%u: %s: Assertion `%s' failed.", file, line, function, - assertion); -} -#endif - -#if 0 -char *simple_itoa(ulong i) -{ - /* 21 digits plus null terminator, good for 64-bit or smaller ints */ - static char local[22] __attribute__((section(".data"))); - char *p = &local[21]; - - *p-- = '\0'; - do { - *p-- = '0' + i % 10; - i /= 10; - } while (i > 0); - return p + 1; -} -#endif diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig index 6a09d88e1b..0b07b90a63 100644 --- a/src/cpu/samsung/exynos5250/Kconfig +++ b/src/cpu/samsung/exynos5250/Kconfig @@ -88,10 +88,6 @@ config SYS_SDRAM_BASE hex "SDRAM base address" default 0x40000000 -config SPL_BUILD - bool - default n - config SYS_TEXT_BASE hex "Executable code section" default 0x43e00000 diff --git a/src/cpu/samsung/exynos5250/clk.h b/src/cpu/samsung/exynos5250/clk.h index 2de949aecb..dbddce0c6d 100644 --- a/src/cpu/samsung/exynos5250/clk.h +++ b/src/cpu/samsung/exynos5250/clk.h @@ -564,8 +564,6 @@ const char *clock_get_mem_manuf_name(enum mem_manuf mem_manuf); * At present we are using 14148 of 14336 bytes. If we change this function * to be exported in SPL, we go over the edge. */ -/* TODO(dhendrix): do we still need this ifndef? */ -//#ifndef CONFIG_SPL_BUILD /** * Get the required memory type and speed (Main U-Boot version). * @@ -581,6 +579,5 @@ const char *clock_get_mem_manuf_name(enum mem_manuf mem_manuf); int clock_get_mem_selection(enum ddr_mode *mem_type, unsigned *frequency_mhz, unsigned *arm_freq, enum mem_manuf *mem_manuf); -//#endif /* CONFIG_SPL_BUILD */ #endif diff --git a/src/cpu/samsung/exynos5250/clock_init.c b/src/cpu/samsung/exynos5250/clock_init.c index 4f21022fd1..27e96ae318 100644 --- a/src/cpu/samsung/exynos5250/clock_init.c +++ b/src/cpu/samsung/exynos5250/clock_init.c @@ -452,7 +452,6 @@ void clock_init_dp_clock(void) setbits_le32(&clk->div_disp1_0, CLK_DIV_DISP1_0_FIMD1); } -#ifdef CONFIG_SPL_BUILD /* * This is a custom implementation for the udelay(), as we do not the timer * initialise during the SPL boot. We are assuming the cpu takes 3 instruction @@ -466,4 +465,3 @@ void udelay(unsigned usec) count = usec * (get_pll_clk(APLL) / (3 * 10000000)); sdelay(count); } -#endif diff --git a/src/cpu/samsung/exynos5250/dmc_common.c b/src/cpu/samsung/exynos5250/dmc_common.c index f91cbb357f..8c4b583a9e 100644 --- a/src/cpu/samsung/exynos5250/dmc_common.c +++ b/src/cpu/samsung/exynos5250/dmc_common.c @@ -22,13 +22,13 @@ * MA 02111-1307 USA */ +#include <arch/io.h> #include <assert.h> #include <common.h> #include <console/console.h> #include <cpu/samsung/exynos5250/setup.h> #include <cpu/samsung/exynos5250/dmc.h> #include <cpu/samsung/exynos5250/clock_init.h> -#include <cpu/samsung/exynos5-common/spl.h> #include <system.h> #include "clock_init.h" diff --git a/src/cpu/samsung/exynos5250/power.c b/src/cpu/samsung/exynos5250/power.c index 7c61655676..60003c4aad 100644 --- a/src/cpu/samsung/exynos5250/power.c +++ b/src/cpu/samsung/exynos5250/power.c @@ -23,12 +23,12 @@ */ #include <common.h> +#include <arch/hlt.h> #include <arch/io.h> #include <console/console.h> #include <cpu/samsung/exynos5250/cpu.h> #include <cpu/samsung/exynos5250/power.h> #include <cpu/samsung/exynos5250/sysreg.h> -#include <cpu/samsung/exynos5-common/spl.h> #include <drivers/maxim/max77686/max77686.h> #include "device/i2c.h" @@ -62,7 +62,7 @@ void power_shutdown(void) clrbits_le32(&power->ps_hold_ctrl, POWER_PS_HOLD_CONTROL_DATA_HIGH); - hang(); + hlt(); } void power_enable_dp_phy(void) diff --git a/src/cpu/samsung/s5p-common/cpu_info.c b/src/cpu/samsung/s5p-common/cpu_info.c index 6b4742ec21..1c4c49f2a6 100644 --- a/src/cpu/samsung/s5p-common/cpu_info.c +++ b/src/cpu/samsung/s5p-common/cpu_info.c @@ -92,7 +92,7 @@ int print_cpuinfo(void) } #endif -#ifndef CONFIG_SPL_BUILD +#if 0 void board_show_dram(ulong size) { enum ddr_mode mem_type; diff --git a/src/cpu/samsung/s5p-common/s5p_gpio.c b/src/cpu/samsung/s5p-common/s5p_gpio.c index 0023beb141..e91b9df650 100644 --- a/src/cpu/samsung/s5p-common/s5p_gpio.c +++ b/src/cpu/samsung/s5p-common/s5p_gpio.c @@ -95,9 +95,7 @@ static struct s5p_gpio_bank *gpio_get_bank(unsigned int gpio) } } -#ifndef CONFIG_SPL_BUILD assert(gpio < GPIO_MAX_PORT); /* ...which it will not be */ -#endif return NULL; } //#endif diff --git a/src/cpu/samsung/s5p-common/timer.c b/src/cpu/samsung/s5p-common/timer.c index 373c3741d2..c6ed83008d 100644 --- a/src/cpu/samsung/s5p-common/timer.c +++ b/src/cpu/samsung/s5p-common/timer.c @@ -67,7 +67,7 @@ int init_timer(void) pwm_init(4, MUX_DIV_4, 0); pwm_config(4, 100000, 100000); pwm_enable(4); -#ifndef CONFIG_SPL_BUILD + /* Use this as the current monotonic time in us */ //gd->timer_reset_value = 0; timer_reset_value = 0; @@ -75,7 +75,6 @@ int init_timer(void) /* Use this as the last timer value we saw */ //gd->lastinc = timer_get_us_down(); lastinc = timer_get_us_down(); -#endif } return 0; diff --git a/src/mainboard/google/snow/Makefile.inc b/src/mainboard/google/snow/Makefile.inc index 130c3545cb..04bf543d40 100644 --- a/src/mainboard/google/snow/Makefile.inc +++ b/src/mainboard/google/snow/Makefile.inc @@ -26,14 +26,6 @@ romstage-y += memory.c romstage-y += romstage.c # ramstage-y += ec.c - -# FIXME: smdk5250_spl and mainboard.c are a mess. In the long -# run we'll want to replace low-level code that calls mainboard code -# with mainboard code that calls low-level code with appropriate -# parameters. Grep around for spl_get_machine_params for examples. -romstage-y += smdk5250_spl.c -ramstage-y += smdk5250_spl.c -#ramstage-y += mainboard.c ramstage-y += ramstage.c # romstage-$(CONFIG_CHROMEOS) += chromeos.c diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index 03fd1be550..690d4aace8 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -32,6 +32,19 @@ #include "mainboard.h" +#if 0 +static int board_wakeup_permitted(void) +{ + const int gpio = GPIO_Y10; + int is_bad_wake; + + /* We're a bad wakeup if the gpio was defined and was high */ + is_bad_wake = ((gpio != -1) && gpio_get_value(gpio)); + + return !is_bad_wake; +} +#endif + void main(void) { struct cbfs_media cbfs; diff --git a/src/mainboard/google/snow/smdk5250_spl.c b/src/mainboard/google/snow/smdk5250_spl.c deleted file mode 100644 index 33f27b17db..0000000000 --- a/src/mainboard/google/snow/smdk5250_spl.c +++ /dev/null @@ -1,89 +0,0 @@ -/* - * Copyright (c) 2012 The Chromium OS Authors. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <arch/gpio.h> -#include <cpu/samsung/exynos5-common/spl.h> -#include <cpu/samsung/exynos5250/gpio.h> - -#define SIGNATURE 0xdeadbeef - -/* Parameters of early board initialization in SPL */ -static struct spl_machine_param machine_param = { - .signature = SIGNATURE, - .version = 1, - .params = "vmubfasirMw", - .size = sizeof(machine_param), - - .mem_iv_size = 0x1f, - .mem_type = DDR_MODE_DDR3, - - /* - * Set uboot_size to 0x100000 bytes. - * - * This is an overly conservative value chosen to accommodate all - * possible U-Boot image. You are advised to set this value to a - * smaller realistic size via scripts that modifies the .machine_param - * section of output U-Boot image. - */ - .uboot_size = 0x100000, - - .boot_source = BOOT_MODE_OM, - .frequency_mhz = 800, - .arm_freq_mhz = 1700, - .serial_base = 0x12c30000, - .i2c_base = 0x12c60000, - .board_rev_gpios = GPIO_D00 | (GPIO_D01 << 16), - .mem_manuf = MEM_MANUF_SAMSUNG, - .bad_wake_gpio = GPIO_Y10, -}; - -struct spl_machine_param *spl_get_machine_params(void) -{ - if (machine_param.signature != SIGNATURE) { - /* TODO: Call panic() here */ - while (1) - ; - } - - return &machine_param; -} - -#if 0 -int board_get_revision(void) -{ - struct spl_machine_param *params = spl_get_machine_params(); - unsigned gpio[CONFIG_BOARD_REV_GPIO_COUNT]; - - gpio[0] = params->board_rev_gpios & 0xffff; - gpio[1] = params->board_rev_gpios >> 16; - return gpio_decode_number(gpio, CONFIG_BOARD_REV_GPIO_COUNT); -} -#endif - -int board_wakeup_permitted(void) -{ - struct spl_machine_param *param = spl_get_machine_params(); - const int gpio = param->bad_wake_gpio; - int is_bad_wake; - - /* We're a bad wakeup if the gpio was defined and was high */ - is_bad_wake = ((gpio != -1) && gpio_get_value(gpio)); - - return !is_bad_wake; -} |