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-rw-r--r--src/include/device/pci_ids.h1
-rw-r--r--src/soc/intel/alderlake/bootblock/report_platform.c1
-rw-r--r--src/soc/intel/common/block/graphics/graphics.c1
3 files changed, 3 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index a4458ea89a..375704612c 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3824,6 +3824,7 @@
#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_6 0x46a6
#define PCI_DEVICE_ID_INTEL_ADL_S_GT1 0x4680
#define PCI_DEVICE_ID_INTEL_ADL_M_GT1 0x46c0
+#define PCI_DEVICE_ID_INTEL_ADL_M_GT2 0x46aa
/* Intel Northbridge Ids */
#define PCI_DEVICE_ID_INTEL_APL_NB 0x5af0
diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c
index a064714dd7..4e071e7cdf 100644
--- a/src/soc/intel/alderlake/bootblock/report_platform.c
+++ b/src/soc/intel/alderlake/bootblock/report_platform.c
@@ -107,6 +107,7 @@ static struct {
{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_5, "Alderlake P GT2" },
{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_6, "Alderlake P GT2" },
{ PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" },
+ { PCI_DEVICE_ID_INTEL_ADL_M_GT2, "Alderlake M GT2" },
};
static inline uint8_t get_dev_revision(pci_devfn_t dev)
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c
index b99d2a851f..753da6f832 100644
--- a/src/soc/intel/common/block/graphics/graphics.c
+++ b/src/soc/intel/common/block/graphics/graphics.c
@@ -304,6 +304,7 @@ static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_ADL_P_GT2_6,
PCI_DEVICE_ID_INTEL_ADL_S_GT1,
PCI_DEVICE_ID_INTEL_ADL_M_GT1,
+ PCI_DEVICE_ID_INTEL_ADL_M_GT2,
0,
};