diff options
Diffstat (limited to 'src')
5 files changed, 71 insertions, 0 deletions
diff --git a/src/soc/intel/common/basecode/Kconfig b/src/soc/intel/common/basecode/Kconfig index 9e0f788eb4..97309854cf 100644 --- a/src/soc/intel/common/basecode/Kconfig +++ b/src/soc/intel/common/basecode/Kconfig @@ -2,3 +2,9 @@ config SOC_INTEL_COMMON_BASECODE bool help Common coreboot stages and non-IP block for Intel platform + +if SOC_INTEL_COMMON_BASECODE + +source "src/soc/intel/common/basecode/*/Kconfig" + +endif diff --git a/src/soc/intel/common/basecode/debug/Kconfig b/src/soc/intel/common/basecode/debug/Kconfig new file mode 100644 index 0000000000..f72055b672 --- /dev/null +++ b/src/soc/intel/common/basecode/debug/Kconfig @@ -0,0 +1,6 @@ +config SOC_INTEL_COMMON_BASECODE_DEBUG_FEATURE + bool + default n + help + Driver to control runtime features of Intel SoC & coreboot. For example, controlling + the CSE firmware update feature without rebuilding the code. diff --git a/src/soc/intel/common/basecode/debug/Makefile.inc b/src/soc/intel/common/basecode/debug/Makefile.inc new file mode 100644 index 0000000000..f783c8d14a --- /dev/null +++ b/src/soc/intel/common/basecode/debug/Makefile.inc @@ -0,0 +1 @@ +romstage-$(CONFIG_SOC_INTEL_COMMON_BASECODE_DEBUG_FEATURE) += debug_feature.c diff --git a/src/soc/intel/common/basecode/debug/debug_feature.c b/src/soc/intel/common/basecode/debug/debug_feature.c new file mode 100644 index 0000000000..5cdbaf7e5a --- /dev/null +++ b/src/soc/intel/common/basecode/debug/debug_feature.c @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <boot_device.h> +#include <commonlib/region.h> +#include <intelbasecode/debug_feature.h> +#include <console/console.h> +#include <fmap.h> + +#define SI_DESC_OEM_SECTION_OFFSET 0xF00 +#define PRE_MEM_FEATURE_CTRL_OFFSET SI_DESC_OEM_SECTION_OFFSET +#define PRE_MEM_FEATURE_CTRL_SZ 64 +#define SI_DESC_REGION_SZ 4096 + +struct pre_mem_ft { + uint8_t reserved[64]; +}; + +static struct pre_mem_ft pre_mem_debug; + +_Static_assert(sizeof(struct pre_mem_ft) % 64 == 0 && sizeof(struct pre_mem_ft) <= 256, + "sizeof(struct pre_mem_ft) must be a multiple of 64 bytes and up to 256 bytes"); + +uint8_t pre_mem_debug_init(void) +{ + struct region_device desc_rdev; + const struct region_device *boot_device = boot_device_ro(); + + if (!boot_device) { + printk(BIOS_ERR, "Failed to get RW boot device\n"); + return 1; + } + + if (rdev_chain(&desc_rdev, boot_device, 0, SI_DESC_REGION_SZ)) { + printk(BIOS_ERR, "Failed to get description region device\n"); + return 1; + } + + if (rdev_readat(&desc_rdev, &pre_mem_debug, PRE_MEM_FEATURE_CTRL_OFFSET, + PRE_MEM_FEATURE_CTRL_SZ) != PRE_MEM_FEATURE_CTRL_SZ) { + printk(BIOS_ERR, "Failed to read Descriptor Region from SPI Flash\n"); + return 1; + } + return 0; +} diff --git a/src/soc/intel/common/basecode/include/intelbasecode/debug_feature.h b/src/soc/intel/common/basecode/include/intelbasecode/debug_feature.h new file mode 100644 index 0000000000..fabf27ddd8 --- /dev/null +++ b/src/soc/intel/common/basecode/include/intelbasecode/debug_feature.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_INTEL_COMMON_BASECODE_DEBUG_FEATURE_H +#define SOC_INTEL_COMMON_BASECODE_DEBUG_FEATURE_H + +#include <types.h> + +/* + * Reads OEM Section area in the Descriptor Region and + * populates pre_mem_debug structure. + */ +uint8_t pre_mem_debug_init(void); + +#endif |