summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/intel/adlrvp/devicetree.cb28
1 files changed, 14 insertions, 14 deletions
diff --git a/src/mainboard/intel/adlrvp/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb
index c18223ff47..f2a8f3779a 100644
--- a/src/mainboard/intel/adlrvp/devicetree.cb
+++ b/src/mainboard/intel/adlrvp/devicetree.cb
@@ -90,17 +90,17 @@ chip soc/intel/alderlake
register "SataSalpSupport" = "1"
register "SataPortsEnable" = "{
- [0] = 1,
- [1] = 1,
- [2] = 1,
- [3] = 1,
+ [0] = 1,
+ [1] = 1,
+ [2] = 1,
+ [3] = 1,
}"
register "SataPortsDevSlp" = "{
- [0] = 1,
- [1] = 1,
- [2] = 1,
- [3] = 1,
+ [0] = 1,
+ [1] = 1,
+ [2] = 1,
+ [3] = 1,
}"
# Enable EDP in PortA
@@ -115,12 +115,12 @@ chip soc/intel/alderlake
register "s0ix_enable" = "1"
register "SerialIoI2cMode" = "{
- [PchSerialIoIndexI2C0] = PchSerialIoPci,
- [PchSerialIoIndexI2C1] = PchSerialIoPci,
- [PchSerialIoIndexI2C2] = PchSerialIoPci,
- [PchSerialIoIndexI2C3] = PchSerialIoPci,
- [PchSerialIoIndexI2C4] = PchSerialIoDisabled,
- [PchSerialIoIndexI2C5] = PchSerialIoPci,
+ [PchSerialIoIndexI2C0] = PchSerialIoPci,
+ [PchSerialIoIndexI2C1] = PchSerialIoPci,
+ [PchSerialIoIndexI2C2] = PchSerialIoPci,
+ [PchSerialIoIndexI2C3] = PchSerialIoPci,
+ [PchSerialIoIndexI2C4] = PchSerialIoDisabled,
+ [PchSerialIoIndexI2C5] = PchSerialIoPci,
}"
register "SerialIoGSpiMode" = "{