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-rw-r--r--src/vendorcode/amd/opensil/Makefile.inc2
-rw-r--r--src/vendorcode/amd/opensil/genoa_poc/Makefile.inc10
-rw-r--r--src/vendorcode/amd/opensil/genoa_poc/filter.h23
-rw-r--r--src/vendorcode/amd/opensil/genoa_poc/meson_cross.template1
-rw-r--r--src/vendorcode/amd/opensil/genoa_poc/opensil_console.c44
-rw-r--r--src/vendorcode/amd/opensil/genoa_poc/opensil_console.h9
6 files changed, 89 insertions, 0 deletions
diff --git a/src/vendorcode/amd/opensil/Makefile.inc b/src/vendorcode/amd/opensil/Makefile.inc
index 5afe075478..ca206aa9bf 100644
--- a/src/vendorcode/amd/opensil/Makefile.inc
+++ b/src/vendorcode/amd/opensil/Makefile.inc
@@ -8,6 +8,8 @@ endif
opensil_dir := $(call strip_quotes,$(CONFIG_AMD_OPENSIL_PATH))
+subdirs-$(CONFIG_SOC_AMD_OPENSIL_GENOA) += genoa_poc
+
ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y)
cpu_family_string="x86"
cpu_string="i686"
diff --git a/src/vendorcode/amd/opensil/genoa_poc/Makefile.inc b/src/vendorcode/amd/opensil/genoa_poc/Makefile.inc
new file mode 100644
index 0000000000..5c7117a318
--- /dev/null
+++ b/src/vendorcode/amd/opensil/genoa_poc/Makefile.inc
@@ -0,0 +1,10 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+CPPFLAGS_ramstage += -I$(opensil_dir)/Include -I$(opensil_dir)/xUSL -I$(opensil_dir)/xUSL/Include -I$(opensil_dir)/xUSL/FCH -I$(opensil_dir)/xUSL/FCH/Common -I$(opensil_dir)/xSIM -I$(opensil_dir)/xPRF
+CPPFLAGS_romstage += -I$(opensil_dir)/Include -I$(opensil_dir)/xUSL -I$(opensil_dir)/xUSL/Include -I$(opensil_dir)/xSIM -I$(opensil_dir)/xPRF
+
+ramstage-y += opensil_console.c
+romstage-y += opensil_console.c
+
+$(obj)/romstage/vendorcode/amd/opensil/genoa_poc/opensil_console.o: CFLAGS_romstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas
+$(obj)/ramstage/vendorcode/amd/opensil/genoa_poc/opensil_console.o: CFLAGS_ramstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas
diff --git a/src/vendorcode/amd/opensil/genoa_poc/filter.h b/src/vendorcode/amd/opensil/genoa_poc/filter.h
new file mode 100644
index 0000000000..b4a94a697f
--- /dev/null
+++ b/src/vendorcode/amd/opensil/genoa_poc/filter.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/* Keep this in sync with opensil SilCommon.h file */
+#define DEBUG_FILTER_APOB 0x00000001UL
+#define DEBUG_FILTER_NBIO 0x00000002UL
+#define DEBUG_FILTER_CCX 0x00000004UL
+#define DEBUG_FILTER_SMU 0x00000008UL
+#define DEBUG_FILTER_DF 0x00000010UL
+#define DEBUG_FILTER_MEM 0x00000040UL
+#define DEBUG_FILTER_FCH 0x00000080UL
+#define DEBUG_FILTER_RAS 0x00000100UL
+
+#define SIL_DEBUG(topic) (CONFIG(OPENSIL_DEBUG_##topic) ? DEBUG_FILTER_##topic : 0)
+
+#define SIL_DEBUG_MODULE_FILTER ( \
+ SIL_DEBUG(APOB) | \
+ SIL_DEBUG(NBIO) | \
+ SIL_DEBUG(CCX) | \
+ SIL_DEBUG(SMU) | \
+ SIL_DEBUG(DF) | \
+ SIL_DEBUG(MEM) | \
+ SIL_DEBUG(FCH) | \
+ SIL_DEBUG(RAS) )
diff --git a/src/vendorcode/amd/opensil/genoa_poc/meson_cross.template b/src/vendorcode/amd/opensil/genoa_poc/meson_cross.template
index b457c802ab..6473b65225 100644
--- a/src/vendorcode/amd/opensil/genoa_poc/meson_cross.template
+++ b/src/vendorcode/amd/opensil/genoa_poc/meson_cross.template
@@ -13,6 +13,7 @@ c_args = ['-nostdinc',
'-include', '##COREBOOT_DIR##/src/include/kconfig.h',
'-include', '##OBJPATH##/config.h',
'-include', '##COREBOOT_DIR##/src/commonlib/bsd/include/commonlib/bsd/compiler.h',
+ '-include', '##OPENSIL_DIR##/../filter.h',
'-DHAS_STRING_H=1',
# openSIL isn't compatible with coreboot's assert implementation, so use special case
'-D_PORTING_H_=1',
diff --git a/src/vendorcode/amd/opensil/genoa_poc/opensil_console.c b/src/vendorcode/amd/opensil/genoa_poc/opensil_console.c
new file mode 100644
index 0000000000..55a352166f
--- /dev/null
+++ b/src/vendorcode/amd/opensil/genoa_poc/opensil_console.c
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+#include <console/console.h>
+#include "opensil_console.h"
+#include <SilCommon.h>
+
+static int translate_opensil_debug_level(size_t MsgLevel)
+{
+ switch (MsgLevel) {
+ case SIL_TRACE_ERROR:
+ return BIOS_ERR;
+ case SIL_TRACE_WARNING:
+ return BIOS_WARNING;
+ case SIL_TRACE_ENTRY:
+ case SIL_TRACE_EXIT:
+ return BIOS_SPEW;
+ case SIL_TRACE_INFO:
+ return BIOS_DEBUG;
+ default:
+ return BIOS_NEVER;
+ }
+}
+
+void HostDebugService(size_t MsgLevel, const char *SilPrefix, const char *Message,
+ const char *Function, size_t Line, ...)
+{
+ if (!CONFIG(OPENSIL_DEBUG_OUTPUT))
+ return;
+
+ const int loglevel = translate_opensil_debug_level(MsgLevel);
+
+ /* print fomatted prefix */
+ if (CONFIG(OPENSIL_DEBUG_PREFIX))
+ printk(loglevel, "%s%s:%zu:", SilPrefix, Function, Line);
+
+ /* print formatted message */
+ va_list args;
+ va_start(args, Line);
+ printk(loglevel, Message, args);
+ va_end(args);
+}
diff --git a/src/vendorcode/amd/opensil/genoa_poc/opensil_console.h b/src/vendorcode/amd/opensil/genoa_poc/opensil_console.h
new file mode 100644
index 0000000000..d3ffb6857f
--- /dev/null
+++ b/src/vendorcode/amd/opensil/genoa_poc/opensil_console.h
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef _VENDORCODE_AND_OPENSIL_CONSOLE
+#define _VENDORCODE_AND_OPENSIL_CONSOLE
+
+void HostDebugService(size_t MsgLevel, const char *SilPrefix, const char *Message,
+ const char *Function, size_t Line, ...);
+
+#endif