aboutsummaryrefslogtreecommitdiff
path: root/src/vendorcode/amd/cimx/sb800/SBCMN.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/vendorcode/amd/cimx/sb800/SBCMN.c')
-rw-r--r--src/vendorcode/amd/cimx/sb800/SBCMN.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/vendorcode/amd/cimx/sb800/SBCMN.c b/src/vendorcode/amd/cimx/sb800/SBCMN.c
index 07adf56141..8e9f0e2814 100644
--- a/src/vendorcode/amd/cimx/sb800/SBCMN.c
+++ b/src/vendorcode/amd/cimx/sb800/SBCMN.c
@@ -16,7 +16,7 @@
*
* Copyright (c) 2011, Advanced Micro Devices, Inc.
* All rights reserved.
- *
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
@@ -24,10 +24,10 @@
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
+ * * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ * its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -38,7 +38,7 @@
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
+ *
* ***************************************************************************
*
*/
@@ -461,7 +461,7 @@ commonInitEarlyBoot (
//PM_Reg 0x7A[15] (CountHaltMsgEn) should be set when C1e option is enabled
//PM_Reg 0x7A[3:0] (NumOfCpu) should be set to 1h when C1e option is enabled
- //PM_Reg 0x80[13] has to set to 1 to enable Message C scheme.
+ //PM_Reg 0x80[13] has to set to 1 to enable Message C scheme.
if (pConfig->MTC1e) {
RWMEM (ACPI_MMIO_BASE + PMIO_BASE + SB_PMIOA_REG7A, AccWidthUint16 | S3_SAVE, 0x7FF0, BIT15 + 1);
RWMEM (ACPI_MMIO_BASE + PMIO_BASE + SB_PMIOA_REG80 + 1, AccWidthUint8 | S3_SAVE, ~BIT5, BIT5);
@@ -693,7 +693,7 @@ commonInitLateBoot (
sbUsbPhySetting (ddVar);
ddVar = (USB3_EHCI_BUS_DEV_FUN << 16);
sbUsbPhySetting (ddVar);
-
+
c3PopupSetting (pConfig);
FusionRelatedSetting (pConfig);
}