diff options
Diffstat (limited to 'src/vendorcode/amd/agesa/f16kb')
-rw-r--r-- | src/vendorcode/amd/agesa/f16kb/gcccar.inc | 29 |
1 files changed, 25 insertions, 4 deletions
diff --git a/src/vendorcode/amd/agesa/f16kb/gcccar.inc b/src/vendorcode/amd/agesa/f16kb/gcccar.inc index 592ee6d00e..bd670590a7 100644 --- a/src/vendorcode/amd/agesa/f16kb/gcccar.inc +++ b/src/vendorcode/amd/agesa/f16kb/gcccar.inc @@ -269,6 +269,13 @@ MSR_MASK = ((1 << MTRR_DEF_TYPE_EN)+(1 << MTRR_DEF_TYPE_FIX_EN)) * Read family specific values to determine the node and core * numbers for the core executing this code. * +* Note: Customized for coreboot: +* A wbinvd is used to send cache to memory. The existing stack is preserved +* at its original location and additional information is preserved (e.g. +* coreboot CAR globals, heap structures, etc.). This implementation should +* NOT be used with S3 resume IF the stack/cache area is not reserved and +* over system memory. +* * Inputs: * none * Outputs: @@ -602,8 +609,13 @@ fam16_disable_stack_remote_read_exit: _RDMSR btr $INVD_WBINVD, %eax # Disable INVD -> WBINVD conversion _WRMSR - wbinvd # Clear the cache tag RAMs - #invd + + #-------------------------------------------------------------------------- + # Send cache to memory. Preserve stack and coreboot CAR globals. + # This shouldn't be used with S3 resume IF the stack/cache area is + # not reserved and over system memory. + #-------------------------------------------------------------------------- + wbinvd #Do Standard Family 16 work mov $HWCR, %ecx # MSR:C001_0015h @@ -1256,8 +1268,17 @@ ClearTheStack: # Stack base is in SS, stack pointer is .endm /***************************************************************************** -* AMD_DISABLE_STACK: Destroy the stack inside the cache. This routine -* should only be executed on the BSP +* AMD_DISABLE_STACK: Implementation is modified for coreboot from +* the original AMD intent. A WBINVD is used in the HOOK +* to send dirty cache contents to DRAM backing before +* disabling cache-as-ram. This is not safe for S3 resume. +* +* todo: +* * rework PI/AGESA source to set DRAM to UC to send +* writes directly to memory +* * move DCACHE_BASE or use postcar stage for teardown +* to eliminate car_migrated problem that will occur +* after wbinvd is changed back to invd * * In: * none |