diff options
Diffstat (limited to 'src/vendorcode/amd/agesa/f15')
| -rw-r--r-- | src/vendorcode/amd/agesa/f15/AGESA.h | 10 | ||||
| -rw-r--r-- | src/vendorcode/amd/agesa/f15/Proc/CPU/cpuLateInit.h | 2 |
2 files changed, 3 insertions, 9 deletions
diff --git a/src/vendorcode/amd/agesa/f15/AGESA.h b/src/vendorcode/amd/agesa/f15/AGESA.h index 6b0171b269..ffa37ae577 100644 --- a/src/vendorcode/amd/agesa/f15/AGESA.h +++ b/src/vendorcode/amd/agesa/f15/AGESA.h @@ -1418,14 +1418,8 @@ typedef enum { ///< CPU MSR Register definitions ------------------------------------------ #define SYS_CFG 0xC0010010 -//#define TOP_MEM 0xC001001A -//#define TOP_MEM2 0xC001001D -#ifndef TOP_MEM - #define TOP_MEM 0xC001001A -#endif -#ifndef TOP_MEM2 - #define TOP_MEM2 0xC001001D -#endif +#define TOP_MEM 0xC001001Aul +#define TOP_MEM2 0xC001001Dul #define HWCR 0xC0010015 #define NB_CFG 0xC001001F diff --git a/src/vendorcode/amd/agesa/f15/Proc/CPU/cpuLateInit.h b/src/vendorcode/amd/agesa/f15/Proc/CPU/cpuLateInit.h index 050ec53b51..d0103477e7 100644 --- a/src/vendorcode/amd/agesa/f15/Proc/CPU/cpuLateInit.h +++ b/src/vendorcode/amd/agesa/f15/Proc/CPU/cpuLateInit.h @@ -116,7 +116,7 @@ CpuLateInitApTask ( #define NorthbridgeCapabilities 0xE8 #define DRAMBase0 0x40 #define MMIOBase0 0x80 -#define TOP_MEM 0xC001001A +#define TOP_MEM 0xC001001Aul #define LOW_NODE_DEVICEID 24 #define LOW_APICID 0 |