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-rw-r--r--src/superio/ite/it8625e/Kconfig10
-rw-r--r--src/superio/ite/it8625e/Makefile.mk3
-rw-r--r--src/superio/ite/it8625e/chip.h12
-rw-r--r--src/superio/ite/it8625e/it8625e.h15
-rw-r--r--src/superio/ite/it8625e/superio.c73
5 files changed, 113 insertions, 0 deletions
diff --git a/src/superio/ite/it8625e/Kconfig b/src/superio/ite/it8625e/Kconfig
new file mode 100644
index 0000000000..2f1d557014
--- /dev/null
+++ b/src/superio/ite/it8625e/Kconfig
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+config SUPERIO_ITE_IT8625E
+ bool
+ select SUPERIO_ITE_COMMON_PRE_RAM
+ select SUPERIO_ITE_ENV_CTRL
+ select SUPERIO_ITE_ENV_CTRL_PWM_FREQ2
+ select SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG
+ select SUPERIO_ITE_ENV_CTRL_8BIT_PWM
+ select SUPERIO_ITE_ENV_CTRL_EXT_ANY_TMPIN
diff --git a/src/superio/ite/it8625e/Makefile.mk b/src/superio/ite/it8625e/Makefile.mk
new file mode 100644
index 0000000000..a906e9bfcb
--- /dev/null
+++ b/src/superio/ite/it8625e/Makefile.mk
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+ramstage-$(CONFIG_SUPERIO_ITE_IT8625E) += superio.c
diff --git a/src/superio/ite/it8625e/chip.h b/src/superio/ite/it8625e/chip.h
new file mode 100644
index 0000000000..6deb23acf1
--- /dev/null
+++ b/src/superio/ite/it8625e/chip.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef SUPERIO_ITE_IT8625E_CHIP_H
+#define SUPERIO_ITE_IT8625E_CHIP_H
+
+#include <superio/ite/common/env_ctrl_chip.h>
+
+struct superio_ite_it8625e_config {
+ struct ite_ec_config ec;
+};
+
+#endif /* SUPERIO_ITE_IT8625E_CHIP_H */
diff --git a/src/superio/ite/it8625e/it8625e.h b/src/superio/ite/it8625e/it8625e.h
new file mode 100644
index 0000000000..bf1f499e77
--- /dev/null
+++ b/src/superio/ite/it8625e/it8625e.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef SUPERIO_ITE_IT8625E_H
+#define SUPERIO_ITE_IT8625E_H
+
+#define IT8625E_SP1 0x01 /* COM1 */
+#define IT8625E_SP2 0x02 /* COM2 */
+#define IT8625E_PP 0x03 /* Parallel port */
+#define IT8625E_EC 0x04 /* Environment controller */
+#define IT8625E_KBCK 0x05 /* PS/2 keyboard */
+#define IT8625E_KBCM 0x06 /* PS/2 mouse */
+#define IT8625E_GPIO 0x07 /* GPIO */
+#define IT8625E_CIR 0x08 /* Consumer infrared */
+
+#endif /* SUPERIO_ITE_IT8625E_H */
diff --git a/src/superio/ite/it8625e/superio.c b/src/superio/ite/it8625e/superio.c
new file mode 100644
index 0000000000..395cb3f96f
--- /dev/null
+++ b/src/superio/ite/it8625e/superio.c
@@ -0,0 +1,73 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <device/device.h>
+#include <device/pnp.h>
+#include <pc80/keyboard.h>
+#include <superio/conf_mode.h>
+#include <superio/ite/common/env_ctrl.h>
+
+#include "chip.h"
+#include "it8625e.h"
+
+static void it8625e_init(struct device *dev)
+{
+ const struct superio_ite_it8625e_config *conf = dev->chip_info;
+ const struct resource *res;
+
+ if (!dev->enabled)
+ return;
+
+ switch (dev->path.pnp.device) {
+ case IT8625E_EC:
+ res = probe_resource(dev, PNP_IDX_IO0);
+ if (!conf || !res)
+ break;
+ ite_ec_init(res->base, &conf->ec);
+ break;
+ case IT8625E_KBCK:
+ pc_keyboard_init(NO_AUX_DEVICE);
+ break;
+ case IT8625E_KBCM:
+ break;
+ }
+}
+
+static struct device_operations ops = {
+ .read_resources = pnp_read_resources,
+ .set_resources = pnp_set_resources,
+ .enable_resources = pnp_enable_resources,
+ .enable = pnp_alt_enable,
+ .init = it8625e_init,
+ .ops_pnp_mode = &pnp_conf_mode_870155_aa,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ /* Serial Port 1 - 0x3f8 */
+ { NULL, IT8625E_SP1, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
+ /* Serial Port 2 - 0x2f8 */
+ { NULL, IT8625E_SP2, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
+ /* Parallel Port */
+ { NULL, IT8625E_PP, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_DRQ0,
+ 0x0ff8, 0x0ff8, },
+ /* Environment Controller */
+ { NULL, IT8625E_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x0ff0, 0x0ff0, },
+ /* PS/2 Keyboard */
+ { NULL, IT8625E_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x0fff, 0x0fff, },
+ /* PS/2 Mouse */
+ { NULL, IT8625E_KBCM, PNP_IRQ0, },
+ /* GPIO */
+ { NULL, IT8625E_GPIO, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IRQ0,
+ 0x0fff, 0x0fe0, 0x0fff, },
+ /* Consumer IR */
+ { NULL, IT8625E_CIR, PNP_IO0 | PNP_IRQ0 | PNP_MSC0, 0x0ff8, },
+};
+
+static void enable_dev(struct device *dev)
+{
+ pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
+}
+
+struct chip_operations superio_ite_it8625e_ops = {
+ .name = "ITE IT8625E Super I/O",
+ .enable_dev = enable_dev,
+};