diff options
Diffstat (limited to 'src/superio/winbond/w83627ehg/w83627ehg.h')
| -rw-r--r-- | src/superio/winbond/w83627ehg/w83627ehg.h | 29 |
1 files changed, 17 insertions, 12 deletions
diff --git a/src/superio/winbond/w83627ehg/w83627ehg.h b/src/superio/winbond/w83627ehg/w83627ehg.h index 60c2b064b2..6d6d05db8b 100644 --- a/src/superio/winbond/w83627ehg/w83627ehg.h +++ b/src/superio/winbond/w83627ehg/w83627ehg.h @@ -27,27 +27,32 @@ #define W83627EHG_SP1 2 /* Com1 */ #define W83627EHG_SP2 3 /* Com2 */ #define W83627EHG_KBC 5 /* PS/2 keyboard & mouse */ -#define W83627EHG_GPIO_GAME_MIDI 7 /* GPIO1, GPIO6, Game port, MIDI port */ -#define W83627EHG_WDTO_PLED 8 /* TODO */ -#define W83627EHG_GPIO_SUSLED 9 /* GPIO2, GPIO3, GPIO4, GPIO5, SUSLED */ +#define W83627EHG_WDTO_PLED 8 /* Watchdog timer timeout, power LED */ #define W83627EHG_ACPI 10 /* ACPI */ #define W83627EHG_HWM 11 /* Hardware monitor */ +/* The following are handled using "virtual LDNs" (hence the _V suffix). */ +#define W83627EHG_SFI_V 6 /* Serial flash interface (SFI) */ +#define W83627EHG_GPIO_GAME_MIDI_V 7 /* GPIO1, GPIO6, game port, MIDI */ +#define W83627EHG_GPIO_SUSLED_V 9 /* GPIO2, GPIO3, GPIO4, GPIO5, SUSLED */ + /* * Virtual devices sharing the enables are encoded as follows: * VLDN = baseLDN[7:0] | [10:8] bitpos of enable in 0x30 of baseLDN */ -#define W83627EHG_SFI ((1 << 8) | 6) /* Flash has bit1 as enable */ -#define W83627EHG_GPIO1 W83627EHG_GPIO_GAME_MIDI /* GPIO1: LDN 7, bit 0 */ -#define W83627EHG_GAME ((1 << 8) | 7) -#define W83627EHG_MIDI ((2 << 8) | 7) -#define W83627EHG_GPIO6 ((3 << 8) | 7) +/* SFI has bit 1 as enable (instead of bit 0 as usual). */ +#define W83627EHG_SFI ((1 << 8) | W83627EHG_SFI_V) + +#define W83627EHG_GPIO1 ((0 << 8) | W83627EHG_GPIO_GAME_MIDI_V) +#define W83627EHG_GAME ((1 << 8) | W83627EHG_GPIO_GAME_MIDI_V) +#define W83627EHG_MIDI ((2 << 8) | W83627EHG_GPIO_GAME_MIDI_V) +#define W83627EHG_GPIO6 ((3 << 8) | W83627EHG_GPIO_GAME_MIDI_V) -#define W83627EHG_GPIO2 W83627EHG_GPIO_SUSLED /* GPIO2: LDN 9, bit 0 */ -#define W83627EHG_GPIO3 ((1 << 8) | 9) -#define W83627EHG_GPIO4 ((2 << 8) | 9) -#define W83627EHG_GPIO5 ((3 << 8) | 9) +#define W83627EHG_GPIO2 ((0 << 8) | W83627EHG_GPIO_SUSLED_V) +#define W83627EHG_GPIO3 ((1 << 8) | W83627EHG_GPIO_SUSLED_V) +#define W83627EHG_GPIO4 ((2 << 8) | W83627EHG_GPIO_SUSLED_V) +#define W83627EHG_GPIO5 ((3 << 8) | W83627EHG_GPIO_SUSLED_V) #if defined(__PRE_RAM__) && !defined(__ROMCC__) void w83627ehg_enable_dev(device_t dev, u16 iobase); |