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Diffstat (limited to 'src/superio/ite/common/ite.h')
-rw-r--r--src/superio/ite/common/ite.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/superio/ite/common/ite.h b/src/superio/ite/common/ite.h
index 19ade4b9b6..1a147bef65 100644
--- a/src/superio/ite/common/ite.h
+++ b/src/superio/ite/common/ite.h
@@ -4,6 +4,7 @@
#define SUPERIO_ITE_COMMON_PRE_RAM_H
#include <device/pnp_type.h>
+#include <stdbool.h>
#include <stdint.h>
#define ITE_UART_CLK_PREDIVIDE_48 0x00 /* default */
@@ -14,11 +15,15 @@ void ite_enable_serial(pnp_devfn_t dev, u16 iobase);
/* Some boards need to init wdt+gpio's very early */
void ite_reg_write(pnp_devfn_t dev, u8 reg, u8 value);
-void ite_enable_3vsbsw(pnp_devfn_t dev);
+void ite_set_3vsbsw(pnp_devfn_t dev, bool enable);
void ite_delay_pwrgd3(pnp_devfn_t dev);
void ite_kill_watchdog(pnp_devfn_t dev);
void ite_ac_resume_southbridge(pnp_devfn_t dev);
+/* Alias for backwards compatibility */
+static inline void ite_enable_3vsbsw(pnp_devfn_t dev) { ite_set_3vsbsw(dev, true); }
+static inline void ite_disable_3vsbsw(pnp_devfn_t dev) { ite_set_3vsbsw(dev, false); }
+
void pnp_enter_conf_state(pnp_devfn_t dev);
void pnp_exit_conf_state(pnp_devfn_t dev);