5 files changed, 161 insertions, 0 deletions
diff --git a/src/superio/NSC/pc97317/Config.lb b/src/superio/NSC/pc97317/Config.lb
new file mode 100644
index 0000000000..94a888e767
--- /dev/null
+++ b/src/superio/NSC/pc97317/Config.lb
@@ -0,0 +1,2 @@
+config chip.h
+object superio.c
diff --git a/src/superio/NSC/pc97317/chip.h b/src/superio/NSC/pc97317/chip.h
new file mode 100644
index 0000000000..a51a6d3378
--- /dev/null
+++ b/src/superio/NSC/pc97317/chip.h
@@ -0,0 +1,26 @@
+#ifndef _SUPERIO_NSC_PC97317
+#define _SUPERIO_NSC_PC97317
+
+#ifndef PNP_INDEX_REG
+#define PNP_INDEX_REG   0x15C
+#endif
+#ifndef PNP_DATA_REG
+#define PNP_DATA_REG    0x15D
+#endif
+#ifndef SIO_COM1
+#define SIO_COM1_BASE   0x3F8
+#endif
+#ifndef SIO_COM2
+#define SIO_COM2_BASE   0x2F8
+#endif
+
+extern struct chip_operations superio_NSC_pc97317_ops;
+
+#include <pc80/keyboard.h>
+#include <uart8250.h>
+
+struct superio_NSC_pc97317_config {
+	struct uart8250 com1, com2;
+	struct pc_keyboard keyboard;
+};
+#endif /* _SUPERIO_NSC_PC97317 */
diff --git a/src/superio/NSC/pc97317/pc97317.h b/src/superio/NSC/pc97317/pc97317.h
new file mode 100644
index 0000000000..cdeca2acea
--- /dev/null
+++ b/src/superio/NSC/pc97317/pc97317.h
@@ -0,0 +1,10 @@
+#define PC97317_KBCK 0x00 /* Keyboard */
+#define PC97317_KBCM 0x01 /* Mouse */
+#define PC97317_RTC  0x02 /* Real-Time Clock */
+#define PC97317_FDC  0x03 /* Floppy */
+#define PC97317_PP   0x04 /* Parallel port */
+#define PC97317_SP2  0x05 /* Com2 */
+#define PC97317_SP1  0x06 /* Com1 */
+#define PC97317_GPIO 0x07
+#define PC97317_PM   0x08 /* Power Management */
+
diff --git a/src/superio/NSC/pc97317/pc97317_early_serial.c b/src/superio/NSC/pc97317/pc97317_early_serial.c
new file mode 100644
index 0000000000..3aa7f99890
--- /dev/null
+++ b/src/superio/NSC/pc97317/pc97317_early_serial.c
@@ -0,0 +1,33 @@
+#include <arch/romcc_io.h>
+#include "pc97317.h"
+
+#define PM_DEV PNP_DEV(0x2e, PC97317_PM)
+#define PM_BASE 0xe8
+
+/* The pc97317 needs clocks to be set up before the serial port will operate */
+
+static void pc97317_enable_serial(device_t dev, unsigned iobase)
+{
+	/* Set base address of power management unit */
+
+	pnp_set_logical_device(PM_DEV);
+	pnp_set_enable(dev, 0);
+	pnp_set_iobase(dev, PNP_IDX_IO0, PM_BASE);
+	pnp_set_enable(dev, 1);
+
+	/* Use on-chip clock multiplier */
+
+	outb(0x03, PM_BASE);
+	outb(inb(PM_BASE + 1) | 0x07, PM_BASE + 1);
+	
+	/* Wait for the clock to stabilise */
+	while(!inb(PM_BASE + 1 & 0x80))
+		;
+
+	/* Set the base address of the port */
+
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 0);
+	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+	pnp_set_enable(dev, 1);
+}
diff --git a/src/superio/NSC/pc97317/superio.c b/src/superio/NSC/pc97317/superio.c
new file mode 100644
index 0000000000..cb49d55e34
--- /dev/null
+++ b/src/superio/NSC/pc97317/superio.c
@@ -0,0 +1,90 @@
+/* Copyright 2000  AG Electronics Ltd. */
+/* This code is distributed without warranty under the GPL v2 (see COPYING) */
+
+#include <arch/io.h>
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include "chip.h"
+#include "pc97317.h"
+
+static void init(device_t dev)
+{
+	struct superio_NSC_pc97317_config *conf;
+	struct resource *res0, *res1;
+
+	if (!dev->enabled) {
+		return;
+	}
+	conf = dev->chip_info;
+	switch(dev->path.u.pnp.device) {
+	case PC97317_SP1:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com1);
+		break;
+
+	case PC97317_SP2:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com2);
+		break;
+
+	case PC97317_KBCK:
+		/* Enable keyboard */
+		pnp_set_logical_device(dev);
+		pnp_set_enable(dev, 0); /* Disable keyboard */
+		pnp_write_config(dev, 0xf0, 0x40); /* Set KBC clock to 8 Mhz */
+		pnp_set_enable(dev, 1); /* Enable keyboard */
+
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		res1 = find_resource(dev, PNP_IDX_IO1);
+		init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
+		break;
+
+#if 0
+	case PC97317_FDC:
+	{
+		unsigned reg;
+		/* Set up floppy in PS/2 mode */
+		outb(0x09, SIO_CONFIG_RA);
+		reg = inb(SIO_CONFIG_RD);
+		reg = (reg & 0x3F) | 0x40;
+		outb(reg, SIO_CONFIG_RD);
+		outb(reg, SIO_CONFIG_RD);       /* Have to write twice to change! */
+		break;
+	}
+#endif
+	default:
+		break;
+	}
+}
+
+static struct device_operations ops = {
+	.read_resources   = pnp_read_resources,
+	.set_resources    = pnp_set_resources,
+	.enable_resources = pnp_enable_resources,
+	.enable           = pnp_enable,
+	.init             = init,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, PC97317_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffb, 0 }, { 0xffb, 0x4}, },
+ { &ops, PC97317_KBCM, PNP_IRQ0 },
+ { &ops, PC97317_RTC,  PNP_IO0 | PNP_IRQ0, { 0xfffe, 0}, },
+ { &ops, PC97317_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0xfffa, 0}, },
+ { &ops, PC97317_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x03fc, 0}, },
+ { &ops, PC97317_SP2,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0xfff8, 0 }, },
+ { &ops, PC97317_SP1,  PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 }, },
+ { &ops, PC97317_GPIO, PNP_IO0, { 0xfff8, 0 } },
+ { &ops, PC97317_PM,   PNP_IO0, { 0xfffe, 0 } },
+};
+
+static void enable_dev(struct device *dev)
+{
+	pnp_enable_devices(dev, &ops,
+		sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
+}
+
+struct chip_operations superio_NSC_pc97317_ops = {
+	CHIP_NAME("NSC 97317")
+	.enable_dev = enable_dev,
+};