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-rw-r--r--src/southbridge/intel/i82801gx/Makefile.inc1
-rw-r--r--src/southbridge/intel/i82801gx/nic.c28
2 files changed, 0 insertions, 29 deletions
diff --git a/src/southbridge/intel/i82801gx/Makefile.inc b/src/southbridge/intel/i82801gx/Makefile.inc
index 3e48fffa6d..1630f939d2 100644
--- a/src/southbridge/intel/i82801gx/Makefile.inc
+++ b/src/southbridge/intel/i82801gx/Makefile.inc
@@ -11,7 +11,6 @@ ramstage-y += ac97.c
ramstage-y += azalia.c
ramstage-y += ide.c
ramstage-y += lpc.c
-ramstage-y += nic.c
ramstage-y += pci.c
ramstage-y += pcie.c
ramstage-y += sata.c
diff --git a/src/southbridge/intel/i82801gx/nic.c b/src/southbridge/intel/i82801gx/nic.c
deleted file mode 100644
index b9dcd31bf7..0000000000
--- a/src/southbridge/intel/i82801gx/nic.c
+++ /dev/null
@@ -1,28 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* This code should work for all ICH* southbridges with a NIC. */
-
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-
-static void nic_init(struct device *dev)
-{
- /* Nothing yet */
-}
-
-static struct device_operations nic_ops = {
- .read_resources = pci_dev_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_dev_enable_resources,
- .init = nic_init,
-};
-
-/* 82801GB/GR/GDH/GBM/GHM (ICH7/ICH7R/ICH7DH/ICH7-M/ICH7-M DH) */
-/* Note: 82801GU (ICH7-U) doesn't have a NIC. */
-/* PCI ID loaded from EEPROM. If EEPROM is 0, 0x27dc is used. */
-static const struct pci_driver i82801gx_nic __pci_driver = {
- .ops = &nic_ops,
- .vendor = PCI_VENDOR_ID_INTEL,
- .device = 0x27dc,
-};