summaryrefslogtreecommitdiff
path: root/src/southbridge
diff options
context:
space:
mode:
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/i82801ix/chip.h14
-rw-r--r--src/southbridge/intel/i82801jx/chip.h12
2 files changed, 13 insertions, 13 deletions
diff --git a/src/southbridge/intel/i82801ix/chip.h b/src/southbridge/intel/i82801ix/chip.h
index 3ec68ae331..ec7b977081 100644
--- a/src/southbridge/intel/i82801ix/chip.h
+++ b/src/southbridge/intel/i82801ix/chip.h
@@ -55,17 +55,17 @@ struct southbridge_intel_i82801ix_config {
/* IDE configuration */
uint8_t sata_port_map : 6;
- int sata_clock_request : 1;
- int sata_traffic_monitor : 1;
+ unsigned int sata_clock_request : 1;
+ unsigned int sata_traffic_monitor : 1;
- int c4onc3_enable:1;
- int c5_enable : 1;
- int c6_enable : 1;
+ unsigned int c4onc3_enable:1;
+ unsigned int c5_enable : 1;
+ unsigned int c6_enable : 1;
- int throttle_duty : 3;
+ unsigned int throttle_duty : 3;
/* Bit mask to tell whether a PCIe slot is implemented as slot. */
- int pcie_slot_implemented : 6;
+ unsigned int pcie_slot_implemented : 6;
/* Power limits for PCIe ports. Values are in 10^(-scale) watts. */
struct {
diff --git a/src/southbridge/intel/i82801jx/chip.h b/src/southbridge/intel/i82801jx/chip.h
index e9632d25de..ae31d4f224 100644
--- a/src/southbridge/intel/i82801jx/chip.h
+++ b/src/southbridge/intel/i82801jx/chip.h
@@ -42,16 +42,16 @@ struct southbridge_intel_i82801jx_config {
/* IDE configuration */
uint8_t sata_port_map : 6;
- int sata_clock_request : 1;
+ unsigned int sata_clock_request : 1;
- int c4onc3_enable:1;
- int c5_enable : 1;
- int c6_enable : 1;
+ unsigned int c4onc3_enable:1;
+ unsigned int c5_enable : 1;
+ unsigned int c6_enable : 1;
- int throttle_duty : 3;
+ unsigned int throttle_duty : 3;
/* Bit mask to tell whether a PCIe slot is implemented as slot. */
- int pcie_slot_implemented : 6;
+ unsigned int pcie_slot_implemented : 6;
/* Power limits for PCIe ports. Values are in 10^(-scale) watts. */
struct {