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path: root/src/southbridge/via/k8t890/ctrl.c
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Diffstat (limited to 'src/southbridge/via/k8t890/ctrl.c')
-rw-r--r--src/southbridge/via/k8t890/ctrl.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/southbridge/via/k8t890/ctrl.c b/src/southbridge/via/k8t890/ctrl.c
index 3180412b90..6e5dbf787c 100644
--- a/src/southbridge/via/k8t890/ctrl.c
+++ b/src/southbridge/via/k8t890/ctrl.c
@@ -51,12 +51,21 @@ void k8x8xx_vt8237r_cfg(struct device *dev, struct device *devsb)
pci_write_config8(dev, 0x70, 0xc2);
/* PCI Control */
+#if !CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD
pci_write_config8(dev, 0x72, 0xee);
+#endif
pci_write_config8(dev, 0x73, 0x01);
+#if CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD
+ pci_write_config8(dev, 0x74, 0x64);
+ pci_write_config8(dev, 0x75, 0x3f);
+#else
pci_write_config8(dev, 0x74, 0x24);
pci_write_config8(dev, 0x75, 0x0f);
+#endif
pci_write_config8(dev, 0x76, 0x50);
+#if !CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD
pci_write_config8(dev, 0x77, 0x08);
+#endif
pci_write_config8(dev, 0x78, 0x01);
/* APIC on HT */
pci_write_config8(dev, 0x7c, 0x7f);
@@ -151,7 +160,9 @@ static void ctrl_init(struct device *dev)
/* PCI CFG Address bits[27:24] are used as extended register address
bit[11:8] */
+#if !CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD
pci_write_config8(dev, 0x47, 0x30);
+#endif
/* VT8237R specific configuration other SB are done in their own directories */