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-rw-r--r--src/southbridge/nvidia/ck804/ck804.h2
-rw-r--r--src/southbridge/nvidia/ck804/smbus.h6
-rw-r--r--src/southbridge/nvidia/mcp55/chip.h2
-rw-r--r--src/southbridge/nvidia/mcp55/ide.c2
-rw-r--r--src/southbridge/nvidia/mcp55/mcp55.h12
-rw-r--r--src/southbridge/nvidia/mcp55/nic.c2
-rw-r--r--src/southbridge/nvidia/mcp55/sata.c1
7 files changed, 17 insertions, 10 deletions
diff --git a/src/southbridge/nvidia/ck804/ck804.h b/src/southbridge/nvidia/ck804/ck804.h
index 5505691d1c..6812b5b653 100644
--- a/src/southbridge/nvidia/ck804/ck804.h
+++ b/src/southbridge/nvidia/ck804/ck804.h
@@ -26,8 +26,6 @@
#define CK804B_BUSN 0x80
#define CK804B_DEVN_BASE (!CONFIG(SB_HT_CHAIN_UNITID_OFFSET_ONLY) ? CK804_DEVN_BASE : 1)
-#ifdef __PRE_RAM__
void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn);
-#endif
#endif
diff --git a/src/southbridge/nvidia/ck804/smbus.h b/src/southbridge/nvidia/ck804/smbus.h
index cec62b3f49..bf0ff3c719 100644
--- a/src/southbridge/nvidia/ck804/smbus.h
+++ b/src/southbridge/nvidia/ck804/smbus.h
@@ -49,7 +49,9 @@ static int smbus_wait_until_done(unsigned smbus_io_base)
return -3;
}
-#ifndef __PRE_RAM__
+
+/* Platform has severe issues placing non-inlined functions in headers. */
+#if ENV_RAMSTAGE
static int do_smbus_recv_byte(unsigned smbus_io_base, unsigned device)
{
unsigned char global_status_register, byte;
@@ -114,7 +116,7 @@ static int do_smbus_send_byte(unsigned smbus_io_base, unsigned device,
return 0;
}
-#endif
+#endif /* ENV_RAMSTAGE */
static int do_smbus_read_byte(unsigned smbus_io_base, unsigned device,
unsigned address)
diff --git a/src/southbridge/nvidia/mcp55/chip.h b/src/southbridge/nvidia/mcp55/chip.h
index adf47252db..4bc8428a1a 100644
--- a/src/southbridge/nvidia/mcp55/chip.h
+++ b/src/southbridge/nvidia/mcp55/chip.h
@@ -18,8 +18,6 @@
#ifndef SOUTHBRIDGE_NVIDIA_MCP55_CHIP_H
#define SOUTHBRIDGE_NVIDIA_MCP55_CHIP_H
-#include <device/device.h>
-
struct southbridge_nvidia_mcp55_config
{
unsigned int ide0_enable : 1;
diff --git a/src/southbridge/nvidia/mcp55/ide.c b/src/southbridge/nvidia/mcp55/ide.c
index 797b9d8780..36e20b4aa0 100644
--- a/src/southbridge/nvidia/mcp55/ide.c
+++ b/src/southbridge/nvidia/mcp55/ide.c
@@ -22,6 +22,8 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
+
+#include "chip.h"
#include "mcp55.h"
static void ide_init(struct device *dev)
diff --git a/src/southbridge/nvidia/mcp55/mcp55.h b/src/southbridge/nvidia/mcp55/mcp55.h
index 8d595c952f..ac689094ca 100644
--- a/src/southbridge/nvidia/mcp55/mcp55.h
+++ b/src/southbridge/nvidia/mcp55/mcp55.h
@@ -24,13 +24,17 @@
#define MCP55_DEVN_BASE CONFIG_HT_CHAIN_UNITID_BASE
#endif
-#ifndef __PRE_RAM__
-#include "chip.h"
+#ifndef __ROMCC__
+#include <device/device.h>
void mcp55_enable(struct device *dev);
extern struct pci_operations mcp55_pci_ops;
-#else
+#endif
+
void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn);
void enable_smbus(void);
+
+/* Concflict declarations with <device/smbus.h>. */
+#if !ENV_RAMSTAGE
int smbus_recv_byte(unsigned device);
int smbus_send_byte(unsigned device, unsigned char val);
int smbus_read_byte(unsigned device, unsigned address);
@@ -40,6 +44,6 @@ int smbusx_send_byte(unsigned smb_index, unsigned device, unsigned char val);
int smbusx_read_byte(unsigned smb_index, unsigned device, unsigned address);
int smbusx_write_byte(unsigned smb_index, unsigned device, unsigned address,
unsigned char val);
-#endif
+#endif /* !ENV_RAMSTAGE */
#endif
diff --git a/src/southbridge/nvidia/mcp55/nic.c b/src/southbridge/nvidia/mcp55/nic.c
index 4ee3a3b79a..af4df44293 100644
--- a/src/southbridge/nvidia/mcp55/nic.c
+++ b/src/southbridge/nvidia/mcp55/nic.c
@@ -25,6 +25,8 @@
#include <device/pci_ops.h>
#include <device/mmio.h>
#include <delay.h>
+
+#include "chip.h"
#include "mcp55.h"
static int phy_read(u8 *base, unsigned phy_addr, unsigned phy_reg)
diff --git a/src/southbridge/nvidia/mcp55/sata.c b/src/southbridge/nvidia/mcp55/sata.c
index 27f60738b3..9f70890ff7 100644
--- a/src/southbridge/nvidia/mcp55/sata.c
+++ b/src/southbridge/nvidia/mcp55/sata.c
@@ -23,6 +23,7 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
+#include "chip.h"
#include "mcp55.h"
static void sata_init(struct device *dev)