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-rw-r--r--src/southbridge/nvidia/ck804/early_setup_car.c10
-rw-r--r--src/southbridge/nvidia/ck804/ht.c2
-rw-r--r--src/southbridge/nvidia/ck804/lpc.c6
3 files changed, 9 insertions, 9 deletions
diff --git a/src/southbridge/nvidia/ck804/early_setup_car.c b/src/southbridge/nvidia/ck804/early_setup_car.c
index bc1e781115..c1670c65a2 100644
--- a/src/southbridge/nvidia/ck804/early_setup_car.c
+++ b/src/southbridge/nvidia/ck804/early_setup_car.c
@@ -143,7 +143,7 @@ static void ck804_early_setup(unsigned ck804_num, unsigned *busn,
CK804_MB_SETUP
#endif
-#if IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AMDFAM10)
+#if CONFIG(NORTHBRIDGE_AMD_AMDFAM10)
/*
* Avoid crash (complete with severe memory corruption!) during initial CAR boot
* in ck804_early_setup_x() on Fam10h systems by not touching 0x78.
@@ -203,7 +203,7 @@ static void ck804_early_setup(unsigned ck804_num, unsigned *busn,
/* SYSCTRL */
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 8, ~(0xff), ((0 << 4) | (0 << 2) | (0 << 0)),
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 9, ~(0xff), ((0 << 4) | (1 << 2) | (1 << 0)),
-#if IS_ENABLED(CONFIG_CK804_USE_NIC)
+#if CONFIG(CK804_USE_NIC)
RES_PCI_IO, CK804_DEV(0xa, 0, 0xf8), 0xffffffbf, 0x00000040,
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 19, ~(0xff), ((0 << 4) | (1 << 2) | (0 << 0)),
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 3, ~(0xff), ((0 << 4) | (1 << 2) | (0 << 0)),
@@ -211,12 +211,12 @@ static void ck804_early_setup(unsigned ck804_num, unsigned *busn,
RES_PCI_IO, CK804_DEV(1, 0, 0xe4), ~(1 << 23), (1 << 23),
#endif
-#if IS_ENABLED(CONFIG_CK804_USE_ACI)
+#if CONFIG(CK804_USE_ACI)
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 0x0d, ~(0xff), ((0 << 4) | (2 << 2) | (0 << 0)),
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 0x1a, ~(0xff), ((0 << 4) | (2 << 2) | (0 << 0)),
#endif
-#if IS_ENABLED(CONFIG_CK804_PCIE_PME_WAKE)
+#if CONFIG(CK804_PCIE_PME_WAKE)
RES_PCI_IO, CK804_DEV(1, 0, 0xe4), 0xffffffff, 0x00400000,
#else
RES_PCI_IO, CK804_DEV(1, 0, 0xe4), 0xffbfffff, 0x00000000,
@@ -285,7 +285,7 @@ static void ck804_early_setup(unsigned ck804_num, unsigned *busn,
RES_PORT_IO_32, ANACTRL_IO_BASE + 0xcc, ~((7 << 4) | (1 << 8)), (CONFIG_CK804B_PCI_E_X << 4) | (1 << 8),
-#if IS_ENABLED(CONFIG_CK804_USE_NIC)
+#if CONFIG(CK804_USE_NIC)
RES_PCI_IO, CK804_DEV(0xa, 0, 0xf8), 0xffffffbf, 0x00000040,
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 19, ~(0xff), ((0 << 4) | (1 << 2) | (0 << 0)),
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 3, ~(0xff), ((0 << 4) | (1 << 2) | (0 << 0)),
diff --git a/src/southbridge/nvidia/ck804/ht.c b/src/southbridge/nvidia/ck804/ht.c
index 6028cd663f..2925b05068 100644
--- a/src/southbridge/nvidia/ck804/ht.c
+++ b/src/southbridge/nvidia/ck804/ht.c
@@ -22,7 +22,7 @@
#include <arch/acpi.h>
#include "chip.h"
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
unsigned long acpi_fill_mcfg(unsigned long current)
{
diff --git a/src/southbridge/nvidia/ck804/lpc.c b/src/southbridge/nvidia/ck804/lpc.c
index fe915eecc2..21235548a0 100644
--- a/src/southbridge/nvidia/ck804/lpc.c
+++ b/src/southbridge/nvidia/ck804/lpc.c
@@ -297,7 +297,7 @@ static void ck804_lpc_enable_resources(struct device *dev)
ck804_lpc_enable_childrens_resources(dev);
}
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
static void southbridge_acpi_fill_ssdt_generator(struct device *device)
{
@@ -310,7 +310,7 @@ static struct device_operations lpc_ops = {
.read_resources = ck804_lpc_read_resources,
.set_resources = ck804_lpc_set_resources,
.enable_resources = ck804_lpc_enable_resources,
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
.acpi_fill_ssdt_generator = southbridge_acpi_fill_ssdt_generator,
.write_acpi_tables = acpi_write_hpet,
#endif
@@ -335,7 +335,7 @@ static struct device_operations lpc_slave_ops = {
.read_resources = ck804_lpc_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
.write_acpi_tables = acpi_write_hpet,
#endif
.init = lpc_slave_init,