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path: root/src/southbridge/nvidia/ck804/ck804_reset.c
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Diffstat (limited to 'src/southbridge/nvidia/ck804/ck804_reset.c')
-rw-r--r--src/southbridge/nvidia/ck804/ck804_reset.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/src/southbridge/nvidia/ck804/ck804_reset.c b/src/southbridge/nvidia/ck804/ck804_reset.c
index accd06e121..ab076cb1c3 100644
--- a/src/southbridge/nvidia/ck804/ck804_reset.c
+++ b/src/southbridge/nvidia/ck804/ck804_reset.c
@@ -6,26 +6,26 @@
#include <arch/io.h>
#define PCI_DEV(BUS, DEV, FN) ( \
- (((BUS) & 0xFFF) << 20) | \
- (((DEV) & 0x1F) << 15) | \
- (((FN) & 0x7) << 12))
+ (((BUS) & 0xFFF) << 20) | \
+ (((DEV) & 0x1F) << 15) | \
+ (((FN) & 0x7) << 12))
typedef unsigned device_t;
static void pci_write_config32(device_t dev, unsigned where, unsigned value)
{
- unsigned addr;
- addr = (dev>>4) | where;
- outl(0x80000000 | (addr & ~3), 0xCF8);
- outl(value, 0xCFC);
+ unsigned addr;
+ addr = (dev>>4) | where;
+ outl(0x80000000 | (addr & ~3), 0xCF8);
+ outl(value, 0xCFC);
}
static unsigned pci_read_config32(device_t dev, unsigned where)
{
- unsigned addr;
- addr = (dev>>4) | where;
- outl(0x80000000 | (addr & ~3), 0xCF8);
- return inl(0xCFC);
+ unsigned addr;
+ addr = (dev>>4) | where;
+ outl(0x80000000 | (addr & ~3), 0xCF8);
+ return inl(0xCFC);
}
#include "../../../northbridge/amd/amdk8/reset_test.c"
@@ -33,7 +33,7 @@ static unsigned pci_read_config32(device_t dev, unsigned where)
void hard_reset(void)
{
set_bios_reset();
- /* Try rebooting through port 0xcf9 */
+ /* Try rebooting through port 0xcf9 */
outb((0 <<3)|(0<<2)|(1<<1), 0xcf9);
outb((0 <<3)|(1<<2)|(1<<1), 0xcf9);
}