diff options
Diffstat (limited to 'src/southbridge/nvidia/ck804/ck804_enable_rom.c')
| -rw-r--r-- | src/southbridge/nvidia/ck804/ck804_enable_rom.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/src/southbridge/nvidia/ck804/ck804_enable_rom.c b/src/southbridge/nvidia/ck804/ck804_enable_rom.c index 285782ed98..fac0da5a3a 100644 --- a/src/southbridge/nvidia/ck804/ck804_enable_rom.c +++ b/src/southbridge/nvidia/ck804/ck804_enable_rom.c @@ -2,10 +2,11 @@ * Copyright 2004 Tyan Computer * by yhlu@tyan.com */ + #if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE - #define CK804_DEVN_BASE HT_CHAIN_END_UNITID_BASE +#define CK804_DEVN_BASE HT_CHAIN_END_UNITID_BASE #else - #define CK804_DEVN_BASE HT_CHAIN_UNITID_BASE +#define CK804_DEVN_BASE HT_CHAIN_UNITID_BASE #endif static void ck804_enable_rom(void) @@ -13,11 +14,11 @@ static void ck804_enable_rom(void) unsigned char byte; device_t addr; - /* Enable 4MB rom access at 0xFFC00000 - 0xFFFFFFFF */ - /* Locate the ck804 LPC */ - addr = PCI_DEV(0, (CK804_DEVN_BASE+1), 0); + /* Enable 4MB ROM access at 0xFFC00000 - 0xFFFFFFFF. */ + /* Locate the ck804 LPC. */ + addr = PCI_DEV(0, (CK804_DEVN_BASE + 1), 0); - /* Set the 4MB enable bit bit */ + /* Set the 4MB enable bit. */ byte = pci_read_config8(addr, 0x88); byte |= 0x80; pci_write_config8(addr, 0x88, byte); |