summaryrefslogtreecommitdiff
path: root/src/southbridge/intel
diff options
context:
space:
mode:
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/common/rcba.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/intel/common/rcba.h b/src/southbridge/intel/common/rcba.h
index 51c404601a..712a477cc1 100644
--- a/src/southbridge/intel/common/rcba.h
+++ b/src/southbridge/intel/common/rcba.h
@@ -11,10 +11,10 @@
#define RCBA 0xf0
#define RCBA_ENABLE 0x01
-#define RCBA8(x) (*((volatile u8 *)(DEFAULT_RCBA + x)))
-#define RCBA16(x) (*((volatile u16 *)(DEFAULT_RCBA + x)))
-#define RCBA32(x) (*((volatile u32 *)(DEFAULT_RCBA + x)))
-#define RCBA64(x) (*((volatile u64 *)(DEFAULT_RCBA + x)))
+#define RCBA8(x) (*((volatile u8 *)(DEFAULT_RCBA + (x))))
+#define RCBA16(x) (*((volatile u16 *)(DEFAULT_RCBA + (x))))
+#define RCBA32(x) (*((volatile u32 *)(DEFAULT_RCBA + (x))))
+#define RCBA64(x) (*((volatile u64 *)(DEFAULT_RCBA + (x))))
#define RCBA_AND_OR(bits, x, and, or) \
(RCBA##bits(x) = ((RCBA##bits(x) & (and)) | (or)))