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-rw-r--r--src/southbridge/intel/bd82x6x/acpi/lpc.asl10
-rw-r--r--src/southbridge/intel/i82801dx/lpc.c7
-rw-r--r--src/southbridge/intel/i82801gx/acpi/lpc.asl10
-rw-r--r--src/southbridge/intel/i82801ix/acpi/lpc.asl10
-rw-r--r--src/southbridge/intel/i82801jx/acpi/lpc.asl10
-rw-r--r--src/southbridge/intel/lynxpoint/acpi/lpc.asl10
6 files changed, 34 insertions, 23 deletions
diff --git a/src/southbridge/intel/bd82x6x/acpi/lpc.asl b/src/southbridge/intel/bd82x6x/acpi/lpc.asl
index 2e86157242..98e979e2eb 100644
--- a/src/southbridge/intel/bd82x6x/acpi/lpc.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/lpc.asl
@@ -1,5 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/hpet.h>
+
// Intel LPC Bus Device - 0:1f.0
Device (LPCB)
@@ -78,7 +80,7 @@ Device (LPCB)
Name(BUF0, ResourceTemplate()
{
- Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
+ Memory32Fixed(ReadOnly, HPET_BASE_ADDRESS, 0x400, FED0)
})
Method (_STA, 0) // Device Status
@@ -91,15 +93,15 @@ Device (LPCB)
If (HPTE) {
CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (Lequal(HPAS, 1)) {
- HPT0 = CONFIG_HPET_ADDRESS + 0x1000
+ HPT0 = HPET_BASE_ADDRESS + 0x1000
}
If (Lequal(HPAS, 2)) {
- HPT0 = CONFIG_HPET_ADDRESS + 0x2000
+ HPT0 = HPET_BASE_ADDRESS + 0x2000
}
If (Lequal(HPAS, 3)) {
- HPT0 = CONFIG_HPET_ADDRESS + 0x3000
+ HPT0 = HPET_BASE_ADDRESS + 0x3000
}
}
diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c
index 972ca76462..238661cd2d 100644
--- a/src/southbridge/intel/i82801dx/lpc.c
+++ b/src/southbridge/intel/i82801dx/lpc.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/hpet.h>
#include <arch/io.h>
#include <arch/ioapic.h>
#include <console/console.h>
@@ -213,7 +214,7 @@ static void enable_hpet(struct device *dev)
u32 reg32, hpet, val;
/* Set HPET base address and enable it */
- printk(BIOS_DEBUG, "Enabling HPET at 0x%x\n", CONFIG_HPET_ADDRESS);
+ printk(BIOS_DEBUG, "Enabling HPET at 0x%x\n", HPET_BASE_ADDRESS);
reg32 = pci_read_config32(dev, GEN_CNTL);
/*
* Bit 17 is HPET enable bit.
@@ -221,7 +222,7 @@ static void enable_hpet(struct device *dev)
*/
reg32 &= ~(3 << 15); /* Clear it */
- hpet = CONFIG_HPET_ADDRESS >> 12;
+ hpet = HPET_BASE_ADDRESS >> 12;
hpet &= 0x3;
reg32 |= (hpet << 15);
@@ -234,7 +235,7 @@ static void enable_hpet(struct device *dev)
val &= 0x7;
if ((val & 0x4) && (hpet == (val & 0x3))) {
- printk(BIOS_INFO, "HPET enabled at 0x%x\n", CONFIG_HPET_ADDRESS);
+ printk(BIOS_INFO, "HPET enabled at 0x%x\n", HPET_BASE_ADDRESS);
} else {
printk(BIOS_WARNING, "HPET was not enabled correctly\n");
reg32 &= ~(1 << 17); /* Clear Enable */
diff --git a/src/southbridge/intel/i82801gx/acpi/lpc.asl b/src/southbridge/intel/i82801gx/acpi/lpc.asl
index 72e28eb362..d2e88902f9 100644
--- a/src/southbridge/intel/i82801gx/acpi/lpc.asl
+++ b/src/southbridge/intel/i82801gx/acpi/lpc.asl
@@ -1,5 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/hpet.h>
+
// Intel LPC Bus Device - 0:1f.0
Device (LPCB)
@@ -60,7 +62,7 @@ Device (LPCB)
Name(BUF0, ResourceTemplate()
{
- Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
+ Memory32Fixed(ReadOnly, HPET_BASE_ADDRESS, 0x400, FED0)
})
Method (_STA, 0) // Device Status
@@ -73,15 +75,15 @@ Device (LPCB)
If (HPTE) {
CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (HPAS == 1) {
- HPT0 = CONFIG_HPET_ADDRESS + 0x1000
+ HPT0 = HPET_BASE_ADDRESS + 0x1000
}
If (HPAS == 2) {
- HPT0 = CONFIG_HPET_ADDRESS + 0x2000
+ HPT0 = HPET_BASE_ADDRESS + 0x2000
}
If (HPAS == 3) {
- HPT0 = CONFIG_HPET_ADDRESS + 0x3000
+ HPT0 = HPET_BASE_ADDRESS + 0x3000
}
}
diff --git a/src/southbridge/intel/i82801ix/acpi/lpc.asl b/src/southbridge/intel/i82801ix/acpi/lpc.asl
index b97b01094d..9227735446 100644
--- a/src/southbridge/intel/i82801ix/acpi/lpc.asl
+++ b/src/southbridge/intel/i82801ix/acpi/lpc.asl
@@ -1,5 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/hpet.h>
+
// Intel LPC Bus Device - 0:1f.0
Device (LPCB)
@@ -60,7 +62,7 @@ Device (LPCB)
Name(BUF0, ResourceTemplate()
{
- Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
+ Memory32Fixed(ReadOnly, HPET_BASE_ADDRESS, 0x400, FED0)
})
Method (_STA, 0) // Device Status
@@ -73,15 +75,15 @@ Device (LPCB)
If (HPTE) {
CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (Lequal(HPAS, 1)) {
- HPT0 = CONFIG_HPET_ADDRESS + 0x1000
+ HPT0 = HPET_BASE_ADDRESS + 0x1000
}
If (Lequal(HPAS, 2)) {
- HPT0 = CONFIG_HPET_ADDRESS + 0x2000
+ HPT0 = HPET_BASE_ADDRESS + 0x2000
}
If (Lequal(HPAS, 3)) {
- HPT0 = CONFIG_HPET_ADDRESS + 0x3000
+ HPT0 = HPET_BASE_ADDRESS + 0x3000
}
}
diff --git a/src/southbridge/intel/i82801jx/acpi/lpc.asl b/src/southbridge/intel/i82801jx/acpi/lpc.asl
index b97b01094d..9227735446 100644
--- a/src/southbridge/intel/i82801jx/acpi/lpc.asl
+++ b/src/southbridge/intel/i82801jx/acpi/lpc.asl
@@ -1,5 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/hpet.h>
+
// Intel LPC Bus Device - 0:1f.0
Device (LPCB)
@@ -60,7 +62,7 @@ Device (LPCB)
Name(BUF0, ResourceTemplate()
{
- Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
+ Memory32Fixed(ReadOnly, HPET_BASE_ADDRESS, 0x400, FED0)
})
Method (_STA, 0) // Device Status
@@ -73,15 +75,15 @@ Device (LPCB)
If (HPTE) {
CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (Lequal(HPAS, 1)) {
- HPT0 = CONFIG_HPET_ADDRESS + 0x1000
+ HPT0 = HPET_BASE_ADDRESS + 0x1000
}
If (Lequal(HPAS, 2)) {
- HPT0 = CONFIG_HPET_ADDRESS + 0x2000
+ HPT0 = HPET_BASE_ADDRESS + 0x2000
}
If (Lequal(HPAS, 3)) {
- HPT0 = CONFIG_HPET_ADDRESS + 0x3000
+ HPT0 = HPET_BASE_ADDRESS + 0x3000
}
}
diff --git a/src/southbridge/intel/lynxpoint/acpi/lpc.asl b/src/southbridge/intel/lynxpoint/acpi/lpc.asl
index 51d777ee41..1e02467a85 100644
--- a/src/southbridge/intel/lynxpoint/acpi/lpc.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/lpc.asl
@@ -1,5 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/hpet.h>
+
// Intel LPC Bus Device - 0:1f.0
#include <southbridge/intel/lynxpoint/pch.h>
@@ -66,7 +68,7 @@ Device (LPCB)
Name (BUF0, ResourceTemplate ()
{
- Memory32Fixed (ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
+ Memory32Fixed (ReadOnly, HPET_BASE_ADDRESS, 0x400, FED0)
})
Method (_STA, 0) // Device Status
@@ -79,15 +81,15 @@ Device (LPCB)
If (HPTE) {
CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (HPAS == 1) {
- HPT0 = CONFIG_HPET_ADDRESS + 0x1000
+ HPT0 = HPET_BASE_ADDRESS + 0x1000
}
If (HPAS == 2) {
- HPT0 = CONFIG_HPET_ADDRESS + 0x2000
+ HPT0 = HPET_BASE_ADDRESS + 0x2000
}
If (HPAS == 3) {
- HPT0 = CONFIG_HPET_ADDRESS + 0x3000
+ HPT0 = HPET_BASE_ADDRESS + 0x3000
}
}
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-08 19:29:50 +0000