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-rw-r--r--src/southbridge/intel/sch/acpi/globalnvs.asl4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/sch/acpi/globalnvs.asl b/src/southbridge/intel/sch/acpi/globalnvs.asl
index 5ac1c83cd6..7db71f96ac 100644
--- a/src/southbridge/intel/sch/acpi/globalnvs.asl
+++ b/src/southbridge/intel/sch/acpi/globalnvs.asl
@@ -30,8 +30,8 @@ Name(\DSEN, 1) // Display Output Switching Enable
* we have to fix it up in coreboot's ACPI creation phase.
*/
-
-OperationRegion (GNVS, SystemMemory, 0xC0DEBABE, 0x100)
+External(NVSA)
+OperationRegion (GNVS, SystemMemory, NVSA, 0x100)
Field (GNVS, ByteAcc, NoLock, Preserve)
{
/* Miscellaneous */